Mitsubishi Electric Melsec Q Series User Manual page 102
Profibus-dp master module
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3
SPECIFICATIONS
Item
AJ95TB2-16T (FDL address 1)
{(2 + 9)
1
Treq
[ms]
= 0.081
(i)
Response time
150
[T
] of i-th station
Bit
2
150
Max_Tsdr
[ms]
(i)
{(0 + 9)
3
= 0.066
Tres
[ms]
(i)
Pt
[ms]
(i)
0.081 + 0.1 + 0.066 = 0.247
(
+
+
)
1
2
3
3
(Pt
i
1
3
- 61
3.5 Processing Time
3.5.1 Bus cycle time
(b) Bus cycle time calculation example
The following shows a calculation example of the bus cycle time:
DP-Master (FDL address 0)
QJ71PB92V
Bus terminator
DP-Slave (FDL address 1)
AJ95TB2-16T
: 0 points
Input
Output: 16 points
Output data size [byte]
Input data size
Figure 3.39 System Configuration Example
1) MSI[ms] value
MSI[ms]=80
2) Pt
[ms] value
(i)
Table3.25 Pt(i) Value
3
6
11}
10
(1.5
10
)
3
6
10
(1.5
10
) = 0.1
3
6
11}
10
(1.5
10
)
3) Tsdi
[ms] value
(M)
Request/response processing time [T
Tsdi
[ms]=200
(M)
4) Lr[ms] value
Lr[ms]=5.50+3
Using the values obtained in above 2) to 4),
T
sdi
)
Lr
{(Pt
(i)
(M)
{
(0.377)
1.16 5.95
7.11
Therefore, the bus cycle time (Bc) value is as follows:
3
Bc[ms] Max (MSI ,
i
1
Max (8, 7.11)
8 [ms]
Transmission speed : 1.5Mbps
No. of DP-Slave
DP-Slave (FDL address 2)
AJ95TB3-16D
Input
: 16 points
Output: 0 points
AJ95TB2-16T AJ95TB3-16D QJ71PB93D
2
[byte]
0
100 [ s]=8.0 [ms]
DP-Slave
AJ95TB3-16D (FDL address 2)
3
{(0 + 9)
11}
10
(1.5
= 0.066
150
3
6
150
10
(1.5
10
) = 0.1
3
{(2 + 9)
11}
10
(1.5
= 0.081
0.066 + 0.1 + 0.081 = 0.247
Bit
3
6
10
/ (1.5
10
)=0.13
-3
150
10
=5.95
T
sdi
)
(Pt
(1)
(M)
(2)
(0.377 )
(0.406)}
(Pt
T
sdi
)
Lr)
(i)
(M)
: 3 modules
Bus terminator
PROFIBUS-DP
DP-Slave (FDL address 3)
QJ71PB93D
Input
: 1 word
Output: 2 words
0
4
2
2
QJ71PB93D (FDL address 3)
6
10
)
{(4 + 9)
11}
10
= 0.095
150
3
150
10
(1.5
6
10
)
{(2 + 9)
11}
10
= 0.081
0.095 + 0.1 + 0.081 = 0.276
] of DP-Master (QJ71PB92V)=200
T
sdi
)
(Pt
T
sdi
(M)
(3)
(M)
5.95
3
6
(1.5
10
)
6
10
) = 0.1
3
6
(1.5
10
)
)}
Lr
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