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Asus AAEON GENE-APL7 User Manual
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Asus AAEON GENE-APL7 User Manual

Asus AAEON GENE-APL7 User Manual

3.5” subcompact board
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GENE-APL7
3.5" Subcompact Board
nd
User's Manual 2
Ed
Last Updated: August 25, 2021

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Summary of Contents for Asus AAEON GENE-APL7

  • Page 1 GENE-APL7 3.5” Subcompact Board User’s Manual 2 Last Updated: August 25, 2021...
  • Page 2 Copyright Notice This document is copyrighted, 2021. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp. ⚫ Intel®, Pentium®, and Celeron® are registered trademarks of Intel Corporation ⚫ Intel Atom™ is a trademark of Intel Corporation ⚫...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity GENE-APL7 MB ⚫ If any of these items are missing or damaged, please contact your distributor or sales representative immediately. Preface...
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page at AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Main Board/ Daughter Board/ Backplane 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○ 连接器及线材...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Main Board/ Daughter Board/ Backplane Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................6 Dimensions ....................... 7 Jumpers and Connectors ..................9 Assembly Options ....................11 Block Diagram ......................12 List of Jumpers ......................13 2.5.1 Clear CMOS Jumper (JP1) .................
  • Page 12 2.6.9 LPC and I2C Port (CN17) ................25 2.6.10 Micro SIM Card Socket (CN18) ..............26 2.6.11 CPU FAN (Optional) (CN22) ..............26 2.6.12 8-bit DIO Port (CN24) ................27 2.6.13 +5V Output for SATA Drive (CN27) ............28 2.6.14 RTC Battery (CN28) ...................
  • Page 13 3.4.5 SIO Configuration ..................56 3.4.5.1 Serial Port 1 Configuration............57 3.4.5.2 Serial Port 2 Configuration ............58 3.4.5.3 Serial Port 3 Configuration ............59 3.4.5.4 Serial Port 4 Configuration ............60 3.4.5.5 Serial Port 5 Configuration ............61 3.4.5.6 Serial Port 6 Configuration ............
  • Page 14 IRQ Mapping Chart ....................87 Appendix B – Mating Connectors ..................98 List of Mating Connectors and Cables .............. 99 Preface...

  • Page 15: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 16: Specifications

    Specifications System Form Factor 3.5'' Subcompact Board Intel® Atom™/ Celeron®/ Pentium® Processor: Pentium N4200 (4C/4T, 1.10 GHz, up to 2.50 GHz) Celeron N3350 (2C/2T, 1.10 GHz, up to 2.40 GHz) Atom E3950 (4C/4T, 1.60 GHz, up to 2.00GHz) Atom E3940 (4C/4T, 1.60GHz, up to 1.80GHz) Atom E3930 (2C/2T, 1.30GHz, up to 1.80GHz) CPU TDP 6W: N4200, N3350...
  • Page 17 Power Power Requirement 12V Only Power Supply Type AT/ATX Connector Phoenix 2-pin Connector Power Consumption Typical Intel® E3950, DDR3L 1866MHz 8GB, 4.15A at +12V Power Consumption Max Intel® E3950, DDR3L 1866MHz 8GB, 4.29A at +12V Display Controller Intel® HD Graphics 500/505 LVDS/ eDP LVDS1 Dual Channel 18/24bit x 1 (Optional: eDP1.3)
  • Page 18 External I/O Power Input Phoenix 2-pin Connector Others — Internal I/O USB2.0 x 8 Serial Port COM3 ~ COM6 (RS232, COM3~COM5 support 5V/12V/RI) Optional: COM3 ~ COM12 Video LVDS1/eDP (Default: LVDS1) LVDS2 SATA SATA III x 1 +5V SATA Power Connector x 1 Audio Audio Header x 1 Speaker Header x 2 (optional)
  • Page 19 Expansion — — Others — Mechanical Dimensions 5.75" x 4" (146mm x 101.7mm) Environment Operating Temperature 32°F ~ 140°F (0°C ~ 60°C) Storage Temperature -40°F ~ 176°F (-40°C ~ 80°C) Operating Humidity 0% ~ 90% relative humidity, non-condensing MTBF 409,108 Certification CE/FCC Chapter 1 –...

  • Page 20: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 21: Dimensions

    Dimensions Component Side Chapter 2 – Hardware Information...
  • Page 22 Solder Side Chapter 2 – Hardware Information...

  • Page 23: Jumpers And Connectors

    Jumpers and Connectors Component Side Chapter 2 – Hardware Information...
  • Page 24 Solder Side Chapter 2 – Hardware Information...

  • Page 25: Assembly Options

    Assembly Options Optional Accessory: GENE-APL7-HSK01 Chapter 2 – Hardware Information...

  • Page 26: Block Diagram

    Block Diagram Chapter 2 – Hardware Information...

  • Page 27: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function Clear CMOS Jumper LVDS1/eDP VDD and BLKT VCC Selection LVDS1/eDP BLKT Control Mode Selection LVDS2 Port BLKT Control Mode Selection LVDS2 Port VDD and BLKT VCC Selection Front Panel Connector COM2 Pin8 Function Selection...

  • Page 28: Lvds1 And Edp Port Operating Vdd/Bklt Selection (Jp2)

    2.5.2 LVDS1 and eDP Port Operating VDD/BKLT Selection (JP2) Backlight Power (Default) +12V LVDS / eDP BKLT (1-3) +5V LVDS / eDP BKLT (3-5) LCD Power (Default) +5V LVDS / eDP VDD (2-4) +3.3V LVDS / eDP VDD (4-6) 2.5.3 LVDS and eDP Port BLKT Control Mode Selection (JP3) 1 2 3 LVDS and eDP VR Mode (1-2) (Default)

  • Page 29: Lvds2 Operating Vdd/Bklt Selection (Jp5)

    2.5.5 LVDS2 Operating VDD/BKLT Selection (JP5) Backlight Power (Default) +12V LVDS2 BKLT (1-3) +5V LVDS2 BKLT (3-5) LCD Power (Default) +5V LVDS2 VDD (2-4) +3.3V LVDS2 VDD (4-6) 2.5.6 Front Panel Connector (JP6) Pin Name Pin Name PWR_BTN- PWR_BTN+ HDD_LED- HDD_LED+ BUZZER- BUZZER+...

  • Page 30: Com1~4 Function Selection (Jp7, Jp9, Jp10, Jp11)

    2.5.7 COM1~4 Function Selection (JP7, JP9, JP10, JP11) Ring (3-4) (Default) +12V (1-2) +5V (5-6) 2.5.8 Auto Power Button Enable/Disable Selection (JP8) 1 2 3 ATX Mode (1-2) AT Mode (2-3) (Default) Chapter 2 – Hardware Information...

  • Page 31: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function LVDS/eDP Port Inverter / Backlight Connector LVDS1/eDP Port LVDS2 Port External +12V Input Audio I/O Port LVDS2 Port Inverter / Backlight Connector Speaker (Left) CN10...
  • Page 32 Label Function CN26 COM Port 4 CN27 +5V Output for SATA Drive CN28 RTC Battery CN29 USB2.0 Port 5 CN30 USB2.0 Port 4 CN31 USB2.0 Port 3 CN32 USB2.0 Port 2 CN33 USB2.0 Port 6 CN34 USB2.0 Port 7 CN35 USB2.0 Port 8 CN36 USB2.0 Port 9...

  • Page 33: Lvds And Edp Port Inverter / Backlight Connector (Cn2, Cn8)

    2.6.1 LVDS and eDP Port Inverter / Backlight Connector (CN2, CN8) BLK_PWR BKL_CONTROL BKL_ENABLE Pin Name Signal Type Signal level BKL_PWR +5V / +12V BKL_CONTROL BKL_ENABLE +3.3V Note: BKL_PWR can be set to +5V or +12V by configuring JP2 and JP5 for dedicated port.

  • Page 34: Lvds Port (Cn4, Cn5)

    2.6.2 LVDS Port (CN4, CN5) Pin Name Signal Type Signal Level BKL_ENABLE BKL_CONTROL LCD_PWR +3.3V/+5V LVDS_A_CLK- DIFF LVDS_A_CLK+ DIFF LCD_PWR +3.3V/+5V LVDS_DA0- DIFF LVDS_DA0+ DIFF LVDS_DA1- DIFF LVDS_DA1+ DIFF LVDS_DA2- DIFF Chapter 2 – Hardware Information...
  • Page 35 Pin Name Signal Type Signal Level LVDS_DA2+ DIFF LVDS_DA3- DIFF LVDS_DA3+ DIFF DDC_DATA +3.3V DDC_CLK +3.3V LVDS_DB0- DIFF LVDS_DB0+ DIFF LVDS_DB1- DIFF LVDS_DB1+ DIFF LVDS_DB2- DIFF LVDS_DB2+ DIFF LVDS_DB3- DIFF LVDS_DB3+ DIFF LCD_PWR +3.3V/+5V LVDS_B_CLK- DIFF LVDS_B_CLK+ DIFF Note: LCD_PWR can be set to +3.3V or +5V by configuring JP2 and JP5 for dedicated port.

  • Page 36: External +12V Input (Cn6)

    2.6.3 External +12V Input (CN6) Pin Name Signal Type Signal Level +12V +12V Note: The maximum current rating of Pin #1/+12V is 7A. 2.6.4 Audio I/O Port (CN7) MIC_L MIC_R GND_AUDIO LINE_L_IN LINE_R_IN GND_AUDIO LEFT_OUT GND_AUDIO RIGHT_OUT +5V_AUDIO Pin Name Signal Type Signal Level MIC_L...

  • Page 37: Speaker (Left) (Cn9)

    Pin Name Signal Type Signal Level LINE_R_IN GND_AUDIO LEFT_OUT GND_AUDIO RIGHT_OUT +5V_AUDIO 2.6.5 Speaker (Left) (CN9) Pin Name Signal Type Signal Level SPK_L+ SPK_L- 2.6.6 I2S I/O Port (CN10) Pin Name Signal Type Signal Level I2S_MCLK I2S_BCLK +V1.8A +1.8V I2S_SDI I2S_SDO I2S_WS_SYNC Chapter 2 –...

  • Page 38: Speaker (Right) (Cn11)

    2.6.7 Speaker (Right) (CN11) Pin Name Signal Type Signal Level SPK_R+ SPK_R- 2.6.8 COM Port (CN12, CN13, CN14, CN15, CN16, CN19, CN20, CN21, CN25, CN26) Note: Pin#8 function can be set by configuring JP9 and JP11 for dedicated COM port (COM1 on CN25 and COM4 on CN26).

  • Page 39: Lpc And I2C Port (Cn17)

    RS-232 Pin Name Signal Type Signal Level ±9V RI/+5V/+12V IN/ PWR +5V/+12V 2.6.9 LPC and I2C Port (CN17) Pin Name Signal Type Signal Level LAD0 +3.3V LAD1 +3.3V LAD2 +3.3V LAD3 +3.3V +3.3V +3.3V LFRAME# LRESET# +3.3V LCLK I2C DATA I2C CLK SERIRQ +3.3V...

  • Page 40: Micro Sim Card Socket (Cn18)

    2.6.10 Micro SIM Card Socket (CN18) Pin Name Signal Type Signal Level UIM_PWR UIM_RST UIM_CLK UIM_VPP UIM_DATA 2.6.11 CPU FAN (Optional) (CN22) Pin Name Signal Type Signal Level FAN_POWER +12V FAN_TAC Note: The maximum current rating of Pin#2/FAN_POWER is 0.5A. Chapter 2 –...

  • Page 41: 8-Bit Dio Port (Cn24)

    2.6.12 8-bit DIO Port (CN24) Pin Name Signal Type Signal Level GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 Note: The maximum current rating of Pin#9/+5V is 1A. Chapter 2 – Hardware Information...

  • Page 42: Output For Sata Drive (Cn27)

    2.6.13 +5V Output for SATA Drive (CN27) Pin Name Signal Type Signal Level Note: The maximum current rating of Pin#1/+5V is 1A. 2.6.14 RTC Battery (CN28) Pin Name Signal Type Signal Level +3.3V 3.3V 2.6.15 USB 2.0 Port (CN29-36) Pin Name Signal Type Signal Level +5VSB...

  • Page 43: Sata Iii Port (Cn37)

    2.6.16 SATA III Port (CN37) Pin 1 Pin 7 Pin Name Signal Type Signal Level SATA_TX+ DIFF SATA_TX- DIFF SATA_RX- DIFF SATA_RX+ DIFF Chapter 2 – Hardware Information...

  • Page 44: Dual Usb3.0 Connector Port 0 And Port 1 (Cn38)

    2.6.17 Dual USB3.0 Connector Port 0 and Port 1 (CN38) Port 1 11 12 13 Port 0 2 3 4 Pin Name Signal Type Signal Level +5VSB USB0_D- DIFF USB0_D+ DIFF USB0_SSRX− DIFF USB0_SSRX+ DIFF USB0_SSTX− DIFF USB0_SSTX+ DIFF +5VSB USB1_D- DIFF USB1_D+...

  • Page 45: Lan (Rj-45) (Cn39, Cn40)

    2.6.18 LAN (RJ-45) (CN39, CN40) Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF MDI3- DIFF Chapter 2 – Hardware Information...

  • Page 46: Com Port 2 And Com Port 3 (Cn41)

    2.6.19 COM Port 2 and COM Port 3 (CN41) RS-232 Pin Name Signal Type Signal Level ±9V ±9V ±9V RI/+5V/+12V IN/ PWR RI/+5V/+12V Note: The maximum current rating of Pin#9 is 1A. Chapter 2 – Hardware Information...
  • Page 47 RS-422 (COM2 Only) Pin Name Signal Type Signal Level RS422_TX- ±5V RS422_TX+ ±5V RS422_RX+ RS422_RX- NC/+5V/+12V +5V/+12V RS-485 (COM2 Only) Pin Name Signal Type Signal Level RS485_D- ±5V RS485_D+ ±5V NC/+5V/+12V +5V/+12V Chapter 2 – Hardware Information...

  • Page 48: Vga Port (Cn42)

    2.6.20 VGA Port (CN42) Pin Name Signal Type Signal Level Analog GREEN Analog BLUE Analog RED_GND_RTN GREEN_GND_RTN BLUE_GND_RTN CRT_PLUG# DDC_DATA HSYNC VSYNC DDC_CLK Chapter 2 – Hardware Information...

  • Page 49: Edp Port (Cn43)

    2.6.21 eDP Port (CN43) Note 1: LCD_PWR can be set to +3.3V or +5V by configuring JP2 for eDP Port. Driving current supports up to 1A. Note 2: +VCC_BKLT_eDP can be set to +5V or +12V by configuring JP2 for eDP Port. Driving current supports up to 2A.

  • Page 50: Msata/ Mini Card Slot (Full-Sized) (Cn44)

    Pin Name Signal Type Signal Level BKLTNESS BKLTEN eDP_HPD +VCC_BKLT_eDP +12V/5V +VCC_BKLT_eDP +12V/5V +VCC_BKLT_eDP +12V/5V +VCC_BKLT_eDP +12V/5V 2.6.22 mSATA/ Mini Card Slot (Full-Sized) (CN44) Note: Default setting is mSATA. Select mode in BIOS. Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V +1.5V...
  • Page 51 Pin Name Signal Type Signal Level PCIE_REF_CLK- DIFF PCIE_REF_CLK+ DIFF W_DISABLE# +3.3V PCIE_RST# +3.3V SATA_RX- DIFF +3.3VSB +3.3V SATA_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V SATA_TX- DIFF SMB_DATA +3.3V SATA_TX+ DIFF Chapter 2 – Hardware Information...

  • Page 52: Mini Card Slot (Full-Sized) (Cn45)

    Pin Name Signal Type Signal Level USB_D- DIFF USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V 2.6.23 Mini Card Slot (Full-Sized) (CN45) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V Chapter 2 – Hardware Information...
  • Page 53 Pin Name Signal Type Signal Level +1.5V +1.5V PCIE_CLK_REQ# PCIE_REF_CLK- DIFF PCIE_REF_CLK+ DIFF W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF Chapter 2 – Hardware Information...
  • Page 54 Pin Name Signal Type Signal Level SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V Chapter 2 – Hardware Information...

  • Page 55: Vga Connector (Cn46)

    2.6.24 VGA connector (CN46) Pin Name Signal Type Signal Level VSYNC HSYNC DDC_CLK DDC_DAT BLUE Analog GREEN Analog Analog 2.6.25 DDR3L SO-DIMM Slot (DIMM1) Standard Specifications Chapter 2 – Hardware Information...

  • Page 56: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...

  • Page 57: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization during the boot up sequence. If an error, fatal or non-fatal, is encountered, the system will output a few short beeps or an error message. The board can usually continue the boot up sequence with non-fatal errors.

  • Page 58: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...

  • Page 59: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...

  • Page 60: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...

  • Page 61: Cpu Configuration

    3.4.1 CPU Configuration Options Summary C-States Disabled Enabled Optimal Default, Failsafe Default Enable/Disable C States. EIST Disabled Enabled Optimal Default, Failsafe Default Enable/Disable Intel SpeedStep. Turbo Mode Disabled Enabled Optimal Default, Failsafe Default Turbo Mode Power Limit 1 Enable Disabled Optimal Default, Failsafe Default Enabled Enable/Disable Power Limit 1...
  • Page 62 Options Summary VT-d Disabled Optimal Default, Failsafe Default Enabled Enable/Disable CP VT-d Chapter 3 – AMI BIOS Setup...

  • Page 63: Sata Configuration

    3.4.2 SATA Configuration Options Summary Chipset SATA Disabled Enabled Optimal Default, Failsafe Default Enables or Disables the Chipset SATA Controller. The Chipset SATA controller supports the 2 black internal SATA ports (up to 3Gb/s supported per port). SATA GEN SPEED Auto Optimal Default;...
  • Page 64 Options Summary mSATA Port Disabled Enabled Optimal Default, Failsafe Default Enable or Disable SATA Port Chapter 3 – AMI BIOS Setup...

  • Page 65: Pci Express Configuration

    3.4.3 PCI Express Configuration Chapter 3 – AMI BIOS Setup...

  • Page 66: Pcie Slot (Cn45)

    3.4.3.1 PCIE Slot (CN45) Options Summary PCIE Slot (CN45) Disabled Enabled Optimal Default, Failsafe Default Control PCIE Slot (CN45) Hot Plug Disabled Optimal Default, Failsafe Default Enabled PCI Express Hot Plug Enable/Disable PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Configure PCIe Speed (CN45) Chapter 3 –...

  • Page 67: Hardware Monitor

    3.4.4 Hardware Monitor Options Summary Smart Fan Disable Enable Optimal Default, Failsafe Default Enables or Disables Smart Fan. Chapter 3 – AMI BIOS Setup...

  • Page 68: Cpu Smart Fan Mode Configuration

    3.4.4.1 CPU Smart Fan Mode Configuration Options Summary Fan 1 Smart Fan Manual Duty Mode Control Auto Duty-Cycle Mode Optimal Default, Failsafe Default Smart Fan Mode Select Temperature Source CPU (external) Optimal Default, Failsafe Default System Select the monitored temperature source for this fan. Duty Cycle 1 Temperature 1 Duty Cycle 2...
  • Page 69 Options Summary Auto fan speed control. Fan speed will follow different temperature by different duty cycle 1-100 Chapter 3 – AMI BIOS Setup...

  • Page 70: Sio Configuration

    3.4.5 SIO Configuration Chapter 3 – AMI BIOS Setup...

  • Page 71: Serial Port 1 Configuration

    3.4.5.1 Serial Port 1 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8h; IRQ=11 IO=2F8h; IRQ=11 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 72: Serial Port 2 Configuration

    3.4.5.2 Serial Port 2 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8h; IRQ=11 IO=3F8h; IRQ=11 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 73: Serial Port 3 Configuration

    3.4.5.3 Serial Port 3 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3E8h; IRQ=11 IO=2E8h; IRQ=11 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 74: Serial Port 4 Configuration

    3.4.5.4 Serial Port 4 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2E8h; IRQ=11 IO=3E8h; IRQ=11 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 75: Serial Port 5 Configuration

    3.4.5.5 Serial Port 5 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2D0h; IRQ=11 IO=2C0h; IRQ=11 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 76: Serial Port 6 Configuration

    3.4.5.6 Serial Port 6 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2C0h; IRQ=11 IO=2D0h; IRQ=11 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 77: Serial Port 7 Configuration

    3.4.5.7 Serial Port 7 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2A0h; IRQ=10 IO=2A8h; IRQ=10 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 78: Serial Port 8 Configuration

    3.4.5.8 Serial Port 8 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2A8h; IRQ=10 IO=2A0h; IRQ=10 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 79: Serial Port 9 Configuration

    3.4.5.9 Serial Port 9 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2B0h; IRQ=10 IO=2B8h; IRQ=10 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 80: Serial Port 10 Configuration

    3.4.5.10 Serial Port 10 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2B8h; IRQ=10 IO=2B0h; IRQ=10 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 81: Serial Port 11 Configuration

    3.4.5.11 Serial Port 11 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=280h; IRQ=10 IO=288h; IRQ=10 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 82: Serial Port 12 Configuration

    3.4.5.12 Serial Port 12 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=288h; IRQ=10 IO=280h; IRQ=10 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 83: Power Management

    3.4.6 Power Management Options Summary Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select system power mode Restore AC Power Loss Last State Optimal Default, Failsafe Default Always On Always Off RTC wake system from S5 Disable Optimal Default, Failsafe Default Fixed Time Fixed Time: System will wake on the hr::min::sec specified.

  • Page 84: Digital Io Port Configuration

    3.4.7 Digital IO Port Configuration Options Summary DIO Port # Output Input Set DIO as Input or Output Output Level High Optimal Default, Failsafe Default Set output level when DIO pin is output Chapter 3 – AMI BIOS Setup...

  • Page 85: Setup Submenu: Chipset

    Setup Submenu: Chipset Chapter 3 – AMI BIOS Setup...

  • Page 86: North Bridge

    3.5.1 North Bridge Chapter 3 – AMI BIOS Setup...

  • Page 87: Lvds Panel Configuration

    3.5.1.1 LVDS Panel Configuration Note: LVDS2 only available for 2 LVDS SKU Options Summary LVDS Disabled Enabled Optimal Default, Failsafe Default Enable/Disabled this panel. LVDS Panel Type 640x480@60Hz 800x480@60Hz 800x600@60Hz 1024x600@60Hz 1024x768@60Hz Optimal Default, Failsafe Default 1280x768@60Hz 1280x800@60Hz 1280x1024@60Hz 1366x768@60Hz 1440x900@60Hz Chapter 3 –...
  • Page 88 Options Summary LVDS Panel Type 1600x1200@60Hz 1920x1080@60Hz 1920x1200@60Hz Select panel type Color Depth 18-bit Optimal Default, Failsafe Default 24-bit 36-bit 48-bit Select Color Depth Backlight Type Normal Optimal Default, Failsafe Default Inverted Select backlight control signal type Backlight Level Optimal Default, Failsafe Default 100% Select backlight control level Backlight PWM Freq...

  • Page 89: Setup Submenu: Security

    Setup Submenu: Security Change User/Administrator Password You can set an Administrator Password or User Password. An Administrator Password must be set before you can set a User Password. The password will be required during boot up, or when the user enters the Setup utility. A User Password does not provide access to many of the features in the Setup utility.

  • Page 90: Secure Boot

    3.6.1 Secure Boot Options Summary Attempt Secure Boot Disabled Optimal Default, Failsafe Default Enabled Secure Boot activated when Platform Key (PK) is enrolled, System mode is User/Deployed, and CSM function is disable Secure Boot Mode Standard Customized Optimal Default, Failsafe Default Secure Boot Mode - Custom &...

  • Page 91: Key Management

    3.6.1.1 Key Management Options Summary Provision Factory Default Disabled Optimal Default, Failsafe Default keys Enabled Allow to provision factory default Secure Boot keys when System is in Setup Mode Chapter 3 – AMI BIOS Setup...

  • Page 92: Setup Submenu: Boot

    Setup Submenu: Boot Options Summary Quiet Boot Disabled Enabled Optimal Default, Failsafe Default Enables or Disables showing boot logo. Monitor Mwait Disable Enabled Auto Optimal Default, Failsafe Default Enable/Disable Monitor Mwait. To install Linux OS, please set this item to disable. Ipv4 PXE Support Disabled Optimal Default, Failsafe Default...

  • Page 93: Setup Submenu: Save & Exit

    Setup Submenu: Save & Exit Chapter 3 – AMI BIOS Setup...

  • Page 94: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...

  • Page 95: Driver Download/Installation

    Driver Download/Installation Drivers for the GENE-APL7 A11 can be downloaded from the product page on the AAEON website by following this link: https://www.aaeon.com/en/p/embedded-single-board-computers-gene-APL7 Download the driver(s) you need and follow the steps below to install them. Step 1 – Install Chipset Drivers Open the Step1 - Chipset folder followed by SetupChipset.exe Follow the instructions Drivers will be installed automatically...
  • Page 96 Step 4 – Install Audio Drivers Open the Step4 - Audio folder followed by 0006-64bit_Win7_Win8_Win81_Win10_R279.exe Follow the instructions Drivers will be installed automatically Step 5 – Install TXE Driver Open the Step5 - TXE folder followed by SetupTXE.exe Follow the instructions Drivers will be installed automatically Step 6 –...

  • Page 97: Appendix A - I/O Information

    Appendix A Appendix A - I/O Information...

  • Page 98: I/O Address Map

    I/O Address Map Appendix A – I/O Information...
  • Page 99 Appendix A – I/O Information...

  • Page 100: Memory Address Map

    A.2 Memory Address Map Appendix A – I/O Information...
  • Page 101 A.3 IRQ Mapping Chart Appendix A – I/O Information...
  • Page 102 Appendix A – I/O Information...
  • Page 103 Appendix A – I/O Information...
  • Page 104 Appendix A – I/O Information...
  • Page 105 Appendix A – I/O Information...
  • Page 106 Appendix A – I/O Information...
  • Page 107 Appendix A – I/O Information...
  • Page 108 Appendix A – I/O Information...
  • Page 109 Appendix A – I/O Information...
  • Page 110 Appendix A – I/O Information...
  • Page 111 Appendix A – I/O Information...
  • Page 112 Appendix B Appendix B – Mating Connectors...
  • Page 113 List of Mating Connectors and Cables The table notes mating connectors and available cables. Connector Function Mating Connector Available Cable P/N Label Cable Vendor Model no CN8, CN2 LVDS Port PHR-5 Inverter CN4, CN5 LVDS HIROSE DF13-30DS-1.25C Audio Molex 51021-1000 Audio Cable 1709100254 CN9, CN11 Speaker...

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