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If the user sampling pulse (uc_loguserpulse_clk100m_reg) is smaller than the minimum setting value of the logging cycle
timing below, it will not work properly. ( Page 193 Timing generator (tg2_top))
After enabling (1) the user sampling pulse (uc_loguserpulse_clk100m_reg), logging processing is performed in the logging
part. During logging processing, even if the user sampling pulse (uc_loguserpulse_clk100m_reg) is enabled (1), it is ignored
by the logging part. The operation when the pulse interval is set below the minimum setting value is shown below.
User sampling pulse
Logging part
(1) Ignores user sampling pulses because logging is in progress.
1μs or less
Logging processing
(1)
Logging processing
11 FPGA INTERNAL CIRCUIT
221
11.4 User Circuit Block
11
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Troubleshooting
