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■Analog output control part function list
No.
Function
Overview
1
D/A conversion
D/A conversion value CH0/CH1 (E0) is generated by MCU system error notification and Analog output part
value
HOLD/CLEAR. The output combinations of D/A conversion values CH0/CH1 (E0) are shown below.
generation
• MCU system error notification = 0b (no error), Analog output part HOLD/CLEAR = 0b (CLEAR), and Analog
control D/A conversion value CH0/CH1 (E0) is output.
• MCU system error notification = 1b (error present), Analog output part HOLD/CLEAR = 0b (CLEAR), and
0000_0000h is output.
• MCU system error notification = 0b (no error), Analog output part HOLD/CLEAR = 1b (HOLD), and Analog
control D/A conversion value CH0/CH1 (E0) is output.
• MCU system error notification = 1b (error found), Analog output part HOLD /CLEAR = 1b (HOLD), and the
previous value is held.
2
D/A conversion
Analog control: Detects the rising edge of D/A conversion value enable (E0) and outputs D/A conversion value
value enable
enable (E0). At the same timing, D/A conversion value enable (E0) is notified to the digital input/output control.
3
Digital input/
Generates the following LDAC output (E0). The output combinations are shown below.
output control
• Analog output part LDAC output selection = 0h, 3h
Outputs 11b
• Analog output part LDAC output selection = 1h
Outputs 00b
• Analog output part LDAC output selection = 2h
Outputs the LDAC signal for inter-channel synchronization.
■LDAC signal for inter-channel synchronization
Receives D/A conversion value enable (E0) and outputs a 300ns pulse (0b enable pulse). A 300ns pulse is
output from the second pulse of D/A conversion value enable (E0) after reset release.
Remarks
11 FPGA INTERNAL CIRCUIT
11.4 User Circuit Block
11
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Troubleshooting
