Table of Contents
Advertisement
Appendix 4
Describes FPGA register areas.
Precautions
Read-only bits: Invalid when writing.
Write-only bits: Fixed to 0 when read.
For the types of each register, refer to the following.
Page 503 List of FPGA register areas
There are restrictions on setting values for parameter register areas. Check the notes and restrictions in the FPGA register details.
Setting value restrictions are checked by firmware at the start of FPGA control and when the parameter save request (RY2) is turned on, and a moderate error
may occur in the module depending on the conflicting restrictions. For details, refer to the following.
Page 445 TROUBLE EXAMPLES of DC INPUT/OUTPUT
The only reset cause for FPGA register areas is a reset.
If there is a cause other than the above, describe it in the reset cause of FPGA register details.
FPGA initial value: Default value set by RTL for the standard and sample circuits.
Firmware setting initial value: Default value set by firmware by parameter initialization command (remote buffer memory address: 1000H).
If there is a cause other than the above, describe in the notes and restrictions section in FPGA register details.
APPX
502
Appendix 4 FPGA register
FPGA register
Advertisement
Table of Contents
Troubleshooting
