Mitsubishi Electric NZ2GN2S-D41P01 User Manual page 556

Cc-link ie tsn fpga module

Table of Contents

Time information

Time information (year) (lgdw_clock_rddata1)

Time information (month, day, hour) (Igdw_clock_rddata2)

Time information (minutes, seconds) (lgdw_clock_rddata3)

Time information (ms) (lgdw_clock_rddata4)

Time information (s) (lgdw_clock_rddata5)

■Description

Time information. Read data (data added in the logging part)

FPGA register

*1 Shows the offset from 1970.

*2 To prevent data inconsistency, it is fixed when the time information (year) (lgdw_clock_rddata1) is read.

■FPGA initial value

■Firmware initial value

■Reset cause

Appendix 4 FPGA register

Time information (month: 1 to

Time information (minutes: 0 to 59)

Time information (Day: 1 to 31)

Time information (ms: 0 to 999)

Time information (s: 0 to 999)

FPGA register address

Time information (year: 0 to 127)

Time information (hour: 0 to 23)

Time information (seconds: 0 to 59)

Troubleshooting