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Digital I/O control digital output selection
■Address
Name
Digital I/O control digital output selection (usr_wreg_086)
■Description
Selects the signal to be output from the user circuit to the digital I/O control part of the standard circuit. Either the digital control
part or the pulse output part can be selected as the output source.
b15
b14
b13
0 (fixed)
(1) Digital I/O (B0)
• 1: Pulse output signal
• 0: Digital control output signal
(2) Digital I/O (B1)
• 1: Pulse output signal
• 0: Digital control output signal
(3) Digital I/O (B2)
• 1: Pulse output signal
• 0: Digital control output signal
(4) Digital I/O (E0)
• 1: Pulse output signal
• 0: Digital control output signal
(5) Digital I/O (E1)
• 1: Pulse output signal
• 0: Digital control output signal
(6) Digital I/O (E2)
• 1: Pulse output signal
• 0: Digital control output signal
■FPGA initial value
0
■Firmware initial value
0
■Reset cause
Reset
APPX
578
Appendix 4 FPGA register
b12
b11
b10
b9
b8
b7
b6
b5
(6)
FPGA register address
1000_B10CH
b4
b3
b2
b1
(5)
(4)
(3)
(2)
b0
(1)
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