Mitsubishi Electric NZ2GN2S-D41P01 User Manual page 602

Cc-link ie tsn fpga module

Table of Contents

User circuit part error signal generation

User circuit part error signal generations (usr_wreg_1D0)

■Description

Generates an error signal to output from the user circuit.

(1) User circuit: Error signal generation

• 1: (1) Output

• 0: (0) Output

■FPGA initial value

■Firmware initial value

■Reset cause

A/D conversion value maximum/minimum value selection

A/D conversion value maximum/minimum selection (usr_wreg_1D8)

■Description

Selects one circuit board from E0 to E2 to transfer the maximum and minimum A/D conversion values to maximum A/D

conversion value CH0 (usr_rreg_1D7) (FPGA register address: 1000_BBAEH) to maximum A/D conversion value CHB

(usr_rreg_1E2) (FPGA register address: 1000_BBC4H), and to minimum A/D conversion value CH0 (usr_rreg_1E3) (FPGA

1000_BBDCH).

(1) Analog control: A/D conversion value maximum/minimum value selection

■FPGA initial value

■Firmware initial value

■Reset cause

Appendix 4 FPGA register

FPGA register address

FPGA register address

Troubleshooting