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Counter control part 32-bit ring counter (2-phase multiple of 4) counter value
■Address
Name
Counter control part 32-bit ring counter (2-phase multiple of 4) counter value (lower side) (B0) (usr_rreg_1B3)
Counter control part 32-bit ring counter (2-phase multiple of 4) counter value (upper side) (B0) (usr_rreg_1B4)
Counter control part 32-bit ring counter (2-phase multiple of 4) counter value (lower side) (B1) (usr_rreg_1B5)
Counter control part 32-bit ring counter (2-phase multiple of 4) counter value (upper side) (B1) (usr_rreg_1B6)
Counter control part 32-bit ring counter (2-phase multiple of 4) counter value (lower side) (B2) (usr_rreg_1B7)
Counter control part 32-bit ring counter (2-phase multiple of 4) counter value (upper side) (B2) (usr_rreg_1B8)
Counter control part 32-bit ring counter (2-phase multiple of 4) counter value (lower side) (E0) (usr_rreg_1B9)
Counter control part 32-bit ring counter (2-phase multiple of 4) counter value (upper side) (E0) (usr_rreg_1BA)
Counter control part 32-bit ring counter (2-phase multiple of 4) counter value (lower side) (E1) (usr_rreg_1BB)
Counter control part 32-bit ring counter (2-phase multiple of 4) counter value (upper side) (E1) (usr_rreg_1BC)
Counter control part 32-bit ring counter (2-phase multiple of 4) counter value (lower side) (E2) (usr_rreg_1BD)
Counter control part 32-bit ring counter (2-phase multiple of 4) counter value (upper side) (E2) (usr_rreg_1BE)
■Description
Stores the counter (2-phase multiple of 4).
■FPGA initial value
0000H
■Firmware initial value
■Reset cause
Reset
APPX
606
Appendix 4 FPGA register
FPGA register address
1000_BB66H
1000_BB68H
1000_BB6AH
1000_BB6CH
1000_BB6EH
1000_BB70H
1000_BB72H
1000_BB74H
1000_BB76H
1000_BB78H
1000_BB7AH
1000_BB7CH
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