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Using a current input signal
Signal source
-19.8...19.8mA
CH0
·
CH3
*1
GND
CH4
·
CH7
GND
CH8
·
CHB
GND
*1 For the cable, use the 2-core shielded twisted pair cable.
*2 Ground the shielded cable of a wire for each channel as well as the FG terminal.
*3 Indicates the internal input resistance of the NZ2EX2S-D41A01.
*4 The FG terminal is common to analog input and analog output.
7 INSTALLATION AND WIRING
82
7.5 External Wiring
FPGA module
E0...2 Board
AD CH0...CH3
*3
V
I
COM
125Ω
Shield
*2
AD CH4...CH7
V
I
COM
AD CH8...CHB
V
I
COM
*4
*2
FG
FG
ADC0
Power supply
ADC1
ADC2
FPGA Board
Connector
monitoring
FPGA
IOE0...2_X1
IOE0...2_X0
IOE0...2_X2
IOE0...2_X4
IOE0...2_X7
IOE0...2_XOEL0
IOE0...2_XOEL1
IOE_RSTL
IOE_DCDL
IOE0...2_X3
IOE0...2_YCK0
IOE0...2_YCK1
IOE0...2_X5
IOE0...2_Y0
IOE0...2_Y1
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Table of Contents
Troubleshooting
