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LG 50PK950 Training Manual
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LG 50PK950 Training Manual

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Training Manual
50PK950 Plasma Display
50PK950 Plasma Display
Advanced Single Scan Troubleshooting
50" Class Full HD 1080p Plasma TV
(50" diagonally)
Wireless Ready
Published October 13
, 2010
th

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Summary of Contents for LG 50PK950

  • Page 1 Training Manual 50PK950 Plasma Display 50PK950 Plasma Display Advanced Single Scan Troubleshooting 50" Class Full HD 1080p Plasma TV (50" diagonally) Wireless Ready Published October 13 , 2010...

  • Page 2: Troubleshooting

    • X Drive Boards (3) • Main Board: Wireless capabilities, Internet via LAN or Wireless using Dongle through USB. • Front IR/Intelligent Sensor, Center LOGO and Motion Remote Boards Interconnect Diagram: 11X17 Foldout Section used as a quick reference sheet. October 2010 50PK950 Plasma...
  • Page 3 Overview of Topics to be Discussed Overview of Topics to be Discussed 50PK950 Plasma Display Section 1 This Section will cover Contact Information and remind the Technician of Important Safety Precautions for the Customer’s Safety as well as the Technician’s and the Equipment.
  • Page 4 LCD-DV: 32LG40, 32LH30, 37LH55, 42LG60, 42LG70, 42LH20, 42LH40, 42LH50, 42LH90, 42SL80, 47LG90, 47LH85, 47LE8500 PLASMA: 42PG20, 42PQ20, 42PQ30, 50PG20, 50PJ350, 50PK950, 50PK950, 50PS80, 50PS60, 60PK750, 60PS11, 60PS60, 60PS80 Also available on the Plasma Page: New Training Materials on New Training Materials on...
  • Page 5 When servicing this product, under no circumstances should the original design be modified or altered without permission from LG Electronics. Unauthorized modifications will not only void the warranty, but may lead to property damage or user injury.
  • Page 6 Increase the separation between the equipment and the receiver; Connect the equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the dealer or an experienced radio/TV technician for help. October 2010 50PK950 Plasma...
  • Page 7 1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy. 2. Check the model label. Verify model names and board model matches. 3. Check details of defective condition and history. Example: Y-SUS or Y-Drive Board Failure, Mal-discharge on screen, etc. October 2010 50PK950 Plasma...
  • Page 8 The final step is to correct the problem. Be careful of ESD and make sure to check the DC Supplies for proper levels. Make all necessary adjustments and lastly always perform a Safety AC Leakage Test before returning the product back to the Customer. October 2010 50PK950 Plasma...
  • Page 9 50PK950 PRODUCT INFORMATION SECTION 50PK950 PRODUCT INFORMATION SECTION This section of the manual will discuss the specifications of the 50PK950 Advanced Single Scan Plasma Display Television. October 2010 50PK950 Plasma...
  • Page 10 2. Wired Remote cable between the TV and Dongle for Control Functions. Media Box Wired Remote to control the Media Box TV A/V Inputs Wireless Receiver/Transmitter “Dongle” Attaches via Velcro to the back of the set HDMI October 2010 50PK950 Plasma...
  • Page 11 Wireless LAN (DLNA Adaptor) Wireless LAN (DLNA Adaptor) Wireless LAN (Sold Separately) Using the LG Wireless LAN for Broadband/DLNA Adaptor, (DLNA: Digital Living Network Alliance) which is sold separately, allows the TV to connect to a wireless LAN network. The DLNA adaptor attaches to the Television via either of the two USB...
  • Page 12 50PK950 Specifications 50PK950 Specifications 1080P PLASMA HDTV For Full Specifications See the Specification Sheet 50" Class (50" diagonal) • INFINIA Series • Wi-Fi Certified • Tru-Black Filter (Adaptor Included) • THX Certified • Wireless 1080p Ready • 1080P Full HD Resolution •...
  • Page 13 HD capability. The new black. Don’t let the lamp in the corner keep you from seeing what’s going on in the movie. LG’s TruBlack Filter helps block glare while boosting images on the screen to improve picture quality and contrast ratio.
  • Page 14 Enjoy twice the picture quality of standard HDTV with almost double the pixel resolution. See sharper details like never before. Just imagine a Blu-ray disc or video game seen on your new LG Full HD 1080p TV. HDMI (1.3 Deep Color) Digital multi-connectivity HDMI (1.3 Deep color) provides a wider bandwidth (340MHz,...
  • Page 15 50PK950 Logo Familiarization Page 3 of 3 50PK950 Logo Familiarization Page 3 of 3 AV Mode "One click" Cinema, Cinema, Sport, Game mode. TAKE IT TO THE EDGE is a true multimedia TV with an AV Mode which allows you to choose from 4 different modes of Cinema, Sports and Game by a single click of a remote control.

  • Page 16: Hz Sub Field Driving

    600 Hz Sub Field Driving is achieved by using 10 sub-fields per frame process (vs. Comp. 8 sub-field/frame) • No smeared images during fast motion scenes Original Image 10 Sub Fields Per Frame Sub Field firing occurs using wall charge and polarity differences between Y-SUS and Z-SUS signals. October 2010 50PK950 Plasma...
  • Page 17 50PK950 Remote Control 50PK950 Remote Control BOTTOM PORTION p/n AKB729140002 TOP PORTION October 2010 50PK950 Plasma...
  • Page 18 50PK950 Rear and Side Input Jacks 50PK950 Rear and Side Input Jacks Either USB port for Software Upgrades, Music, Videos and Photos and the Wireless Dongle USB 2 AC In USB 1 SIDE HDMI 4 INPUTS Wireless Media Box Remote...
  • Page 19 105-201M or p/n MKJ39170828 2) Press “In-Start” 3) A Password screen appears. 4) Enter the Password. Note: A Password is required to enter the Service Menu. Enter; 0000 Note: If 0000 does not work use 0413. MKJ39170828 105-201M October 2010 50PK950 Plasma...
  • Page 20 Simple Manual Bring up the Customer’s Menu then Press the Red button on Remote Scroll down to item 9 Network Connections With Software Update Highlighted, Press Select on Remote Continue on next page October 2010 50PK950 Plasma...
  • Page 21 Service call number, Model name, SW version and serial No. is displayed. Note: Confirm the “Suffix” of the model number. If the Main board is replaced, the Model and Serial number must be reinserted into memory. See Model Number D/L. October 2010 50PK950 Plasma...
  • Page 22 Do not remove AC power or the USB Flash Drive. restarted. Do not turn off Power, during the upgrade 8) When download is completed, you will see process. “COMPLETE”. Software Files are now available from 9) Your TV will be restarted automatically. LGTechassist.com October 2010 50PK950 Plasma...
  • Page 23 WARNING: Use extreme Caution when using the Manual “Forced” Download Menu. Any file can be downloaded when selected and may cause the Main board to become inoperative if the incorrect file was selected. October 2010 50PK950 Plasma...
  • Page 24 Use the cursor right or left to select the area to change. Use the cursor up or down to change. Cursor right until there is no text cursor blinking. Scroll down to highlight “Serial Number” and change. October 2010 50PK950 Plasma...
  • Page 25 Service Menu: Panel Control Shows Control Board Information Service Menu: Panel Control Shows Control Board Information At the bottom right you can see the Panel Model Number, Control board Software Version and the Panel Temperature October 2010 50PK950 Plasma...
  • Page 26 Service Menu: Downloading EDID Data Pg 1 of 2 Service Menu: Downloading EDID Data Pg 1 of 2 1) Press “ADJ” key. 2) Select menu, Either “PCM EDID D/L” or AC3 EDID D/L October 2010 50PK950 Plasma...
  • Page 27 Note: When PCM is downloaded, AC3 will be N/G and when AC3 is downloaded PCM will be N/G. This means that when PCM is OK, PCM audio is priority and when AC3 is OK, AC3 audio is priority. October 2010 50PK950 Plasma...
  • Page 28 50PK950 Dimensions Power Consumption: There must be at least 4 inches of Clearance on all sides 2-1/8" 504 Watts (Typical) 53.98mm 46-7/8" 0.1 Watts (Stand-By) 1191.26mm 5-1/2" 140mm 15-3/4" 15-9/16" 400mm 396mm 31-1/2" 15-3/4" 800.1mm 400mm 29" Model No. 736.6mm Serial No.
  • Page 29 DISASSEMBLY SECTION This section of the manual will discuss Disassembly, Layout and Circuit Board Identification, of the 50PK950 Advanced Single Scan Plasma Display Panel. Upon completion of this section the Technician will have a better understanding of the disassembly procedures, the layout of the printed circuit boards and be able to identify each board.
  • Page 30 To remove the back cover, remove the 29 screws Indicated by the arrows. (The Stand does not need to be removed). PAY CLOSE ATTENTION TO THE TYPE, SIZE AND LENGTH Of the screws when replacing the back cover. Improper type can damage the front. October 2010 50PK950 Plasma...
  • Page 31 Main Board AC In Heat Sink Side Input (part of main) Left “X” Center “X” Right “X” Conductive Tape Conductive Tape IR/LED Soft Touch Center Motion Remote Invisible Invisible Board Keypad LOGO Board Board Speaker Speaker October 2010 50PK950 Plasma...
  • Page 32 50PK950 Connector Identification Diagram 50PK950 Connector Identification Diagram p/n: EBT60955910 50PK950-UA AUSALHR MAIN p/n: EBR63035301 p/n: EBR68027905 50PK950-UA AUSALJR Y-DRIVE Board p/n: EBT60955914 50PK950-UA AUSALUR Z-SUB UPPER p/n: EBT60955914 50PK950-UA AUSLLUR Board Board Z-SUS P102 P812 P113 Board P811 p/n: EAY60968801...
  • Page 33 Note: Y-SUS, Z-SUS and Y-Drive Boards are mounted on board stand-offs that have a small collar. The board must be lifted slightly to clear these collars. Behind each board are Rubber pieces that act as a cushion. They may make the board stick when removing. October 2010 50PK950 Plasma...
  • Page 34 Disconnect P100 and P101. Note: P101 is a ribbon connector. Lift up the locking mechanism and slide the ribbon cable out. KEY PAD: The Key Pad is a thin strip of static sensitive material attached to the front glass. It is not removable. October 2010 50PK950 Plasma...
  • Page 35 Disconnect all TCP ribbon cables from the defective X-Drive board and all other Ribbon cables going to the board. Remove the 5 screws holding the defective X-Drive board in place. Remove the board. Reassemble in reverse order. Recheck VA / VS / VSC / -VY / Z-Bias. October 2010 50PK950 Plasma...
  • Page 36 Getting to the X Circuit Boards With Stand removed Left Right Warning: Never run the TV with the TCP Heat Sink removed Ground Wire Heat Sink Warning Shorting Hazard: Conductive Tape. Do not allow to touch energized circuits. October 2010 50PK950 Plasma...
  • Page 37 (See next page for precautions) Removing Connectors to the TCPs. Gently lift the locking mechanism upward on all TCP connectors Left X: P101~108 Example Center X: P201~207 Right X: P301~308 Cushion (Chocolate) Flexible ribbon cable connector October 2010 50PK950 Plasma...
  • Page 38 They have to be lifted up slightly to pull the Ribbon Cable out. Note: TCP is usually stuck down to the Chocolate heat transfer material, be Very Careful when lifting up on the TCP ribbon cable. October 2010 50PK950 Plasma...
  • Page 39 The Left X Board passes drive signals to 8 TCP’s on the right side of the screen The Center X Board passes drive signals to 7 TCP’s in the center of the screen The Right X Board passes drive signals to 8 TCP’s on left side of the screen October 2010 50PK950 Plasma...
  • Page 40 CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT ALIGNMENT SECTION CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT ALIGNMENT SECTION 50PK950 Plasma Display This Section will cover Circuit Operation, Troubleshooting of the Power Supply, Y-SUS Board, Y-Drive Boards, Z-SUS Board, Control Board, Main Board and the X Drive Boards. Alignment of the Power Supply, Y-SUS Board and the Z-SUS Board.
  • Page 41 50PK950 Signal and Voltage Distribution Block SMPS OUTPUT VOLTAGES IN STBY Display Panel Y Drive 5VFG (5V) measured SMPS TURN ON SEQUENCE STB +5V Horizontal Upper from Floating Ground SMPS OUTPUT VOLTAGES IN RUN Step 1: RL ON 17V, AC Det)
  • Page 42 (12) Panel Model Name (5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb) (13) Max. Watt (Full White) (6) Trade name of LG Electronics (14) Max. Volts (7) Manufactured date (Year & Month) (15) Max. Amps...
  • Page 43 1) When the Y-SUS board is replaced “Rear View” 2) When a “Mal-Discharge” problem is encountered All label references are from a specific panel. 3) When any abnormal picture issue is They are not the same for every panel encountered. encountered October 2010 50PK950 Plasma...
  • Page 44 Check the silk screen label on the top center of the Power Supply board to identify the correct part number. (It may vary in your specific model number). On the following pages, we will examine the Operation of this Power Supply. October 2010 50PK950 Plasma...
  • Page 45 There are 2 adjustments located on the Power Supply Board VA and VS. The Adjustments M5V is pre-adjusted and fixed. All adjustments are made referenced to Chassis Ground. Use “Full White Raster” 100 IRE VR901 VR501 October 2010 50PK950 Plasma...
  • Page 46 50PK950 SMPS Layout Drawing 50PK950 SMPS Layout Drawing P811 POWER SUPPLY P812 VR901 p/n: EAY60968801 VS Adj T901 D902 D901 Q801 F801 D501 0.8V STBY T902 F801 Q802 390V Run VR501 Q501 4A/250V VA Adj F302 D603 Ground D355 158V...
  • Page 47 0.8V Stby 390V Run 4Amp/250V VA Source VA VR501 Fuse F302 158V Stby 17V Source 390V Run 2.5Amp/250V Bridge Rectifiers STBY 5V, RL104 RL103 5V Source To MAIN P813 Main Fuse 10Amp/250V F101 AC Input SC 101 October 2010 50PK950 Plasma...
  • Page 48 (opened), it pulls up and places the Controller (IC701) into the Auto mode. In this state, the Controller turns on the power supply in stages automatically. A load is necessary to perform a good test of the SMPS if the Main board is suspect. October 2010 50PK950 Plasma...
  • Page 49 50PK950 Television Turn On Sequence 50PK950 Television Turn On Sequence In Stand-By Primary side is 158V F302 In Run (Relay On) Primary side is 390V POWER SUPPLY F801 Stand-By 0.8V (SMPS) AC In Run 390V Stand Regulator By 5V Reg STBY 3.48V...
  • Page 50 When the M5V from the SMPS through the Y-SUS arrives on the Control board, the control develops 3.3V and 1.8V for internal use and 3.3V which is routed down to the each X-Board for each TCP’s low voltage processing voltage. October 2010 50PK950 Plasma...
  • Page 51 Pin 1 or 2 Vs Adjust: Place voltmeter on VS TP. Adjust VR901 until the reading matches your Panel’s label. Va Adjust: Place voltmeter on VA TP. Adjust VR501 until the reading matches your Panel’s label. October 2010 50PK950 Plasma...
  • Page 52 Check Pin 8 for (+5.17V) AC DET WILL NOT be present until set comes on. for Error Det (4.1V) If AC Det is missing, the TV will NOT come on. Check Pin 16 for AC Det (4.06V) October 2010 50PK950 Plasma...
  • Page 53 (C) Add a 100Ω ¼ watt resistor from any 5V line to M_ON to make the (Monitor) M5V, VS and VA lines operational. P811, P812 (VS pins 1 and 2) and (VA pins 5 and 6). October 2010 50PK950 Plasma...
  • Page 54 Note: If the AC Det line is Missing, the TV will not turn on. (Relays will click, then no functions). Note: Pin 18 is grounded on the Main board. If this line is floated, the SMPS turns on Automatically when AC is applied. Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 55 * Note: This voltage will vary in accordance with Panel Label P102 Z-SUS does not use Va or M5V from P811. M5V routed through Y-SUS, Control board, in on P107. Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 56 FG 5V Used in the Development of the Drive Waveform (Measured from Floating Gnd) FG 15V -Vy and VSC generated when Vs arrives on the board. FG5V, FG15V and 18V generated when M5V arrives on the board. October 2010 50PK950 Plasma...
  • Page 57 Left X Board 5V/15V by DC/DC Converters FETs amplify Y-Sustain Waveform Y-Drive Boards Receive Y-Scan Waveform Logic signals Display Panel needed to scan the panel Logic signals needed to generate drive waveform and Scan the Panel October 2010 50PK950 Plasma...
  • Page 58 Remove the Y-Drive the Control Board boards completely if these P101 connectors are removed or the boards will fail. P114 IC304 FG5V Va to Left X Board Screw is FS301 (18V) Pins 5~7 Floating Gnd 2A/125V October 2010 50PK950 Plasma...
  • Page 59 D313 Note With No Y-Drives: (18V) 1-4) VA 17) CLK 0.68V 1.74V FG24V Set-Dn P114 FG24V reads 24.5V T301 18) n/c Open Open 5) n/c FG11V 19-20) FG5V 5.06V 1.787V FG10V reads 11.1V 6-7) Gnd D302 October 2010 50PK950 Plasma...
  • Page 60 2) Adjust VSC to Panel’s Label voltage (+/- 1/2V) Location: Top Left of the board R324 R334 VSC TP VR302 -Vy TP -Vy Adj Location: Bottom Center of board Just above Transformer VR301 VSC Adj Both voltages read positive October 2010 50PK950 Plasma...
  • Page 61 There is another test point on the Upper Y-Drive board that can be used. Basically any output pin to any of the FPC to the panel are OK to use. X10 Sub Field Firing (600Hz) Video October 2010 50PK950 Plasma...
  • Page 62 Note, this TP (VS_DA) can be used as an External Trigger for scope when locking onto the Y-Scan (Scan) or the Z-Drive signal. This signal can also be used to help lock the scope when observing the LVDS video signals. October 2010 50PK950 Plasma...
  • Page 63 SET-UP can be made using VR402 and the FIG4 SET-DN can be made using VR401. 40uS It will make this adjustment easier if you use the Area for Set-Dn “Expanded” mode of your scope. adjustment 180 uSec October 2010 50PK950 Plasma...
  • Page 64 1) Adjust VR402 and set the (A) portion of the signal to match the waveform above. (320V p/p ± 5V) SET-DN ADJUST: 2) Adjust VR401 and set the (B) time of the signal to match the waveform above. (180uSec ± 5uSec) ADJUSTMENT LOCATIONS: Bottom of the board. October 2010 50PK950 Plasma...
  • Page 65 LVDS Too Low from Control 82uSec board and make necessary adjustments. Then reconnect This will cause LVDS cable, The black select White Portions of the Picture to Wash and adjust Lighten. correctly. Black floor Up. October 2010 50PK950 Plasma...
  • Page 66 This Section of the Presentation will cover troubleshooting the Y-SUS Board. Warning: Never run the Y-SUS with P118 or P117 removed unless the Y-Drive boards are removed completely. TIP: Do not use C325 Right leg to adjust the Y-Scan signal. October 2010 50PK950 Plasma...
  • Page 67 09) FGnd 10) OC2 150VAC RMS 11) FGnd From Floating Gnd 12) Data 13) FGnd P117 Pins 15~20 14) n/c 15-20) Y-Scan FGnd (4mSec per/div) Y-Drive Connected 432~446V p/p Y-Drive Removed 428V p/p Y-SUS Board Y-Drive Upper October 2010 50PK950 Plasma...
  • Page 68 All logic pins about (432V p/p) 14) n/c with Y-Drives 15-20) Y-Scan All logic pins about (392V p/p) without Y-Drives Y-Drive Upper Y-SUS Board P117 Pins 4, 6, 8, 10, 12 are Logic (Drive) Signals to the Y-Drive Upper. October 2010 50PK950 Plasma...
  • Page 69 09) FGnd 10) OC2 1.73V 0.631V 11) FGnd 12) Data 1.73V 0.629V 13) FGnd 14) n/c Y-SUS Board Y-Drive Upper 15-20) Y-Scan Open 3.04 Meter in the Diode Mode Y-Drive Board should be disconnected for this test. October 2010 50PK950 Plasma...
  • Page 70 FG5V measured from 18) n/c Pins 19 or 20 to 19-20) FG5V Floating Gnd Use screw just above P118 on the Y-SUS Y-SUS Board Y-Drive Lower P118 Pins 1~6 is the Y-Scan Signal to the Y-Drive Lower. October 2010 50PK950 Plasma...
  • Page 71 All logic pins about (432V p/p) 18) n/c with Y-Drives 19-20) FG5V All logic pins about (392V p/p) without Y-Drives Y-SUS Board Y-Drive Lower P118 Pins 9, 11, 13, 15, 17 are Logic (Drive) Signals into the Y-Drive Upper. October 2010 50PK950 Plasma...
  • Page 72 0.629V 14) FGnd 15) STB 1.73V 0.627V 16) FGnd 17) CLK 1.73V 0.627V 18) n/c Y-SUS Board Y-Drive Lower 19-20) FG5V 1.78V 0.544V Y-Drive Board should be Meter in the disconnected for this test. Diode Mode October 2010 50PK950 Plasma...
  • Page 73 D302 T301 FG11V Use right leg to IC304 check for source FG5V (Floating Ground 5V). Checked at IC304 Left Leg. Leaves the Y-SUS board on P118 pins 19 and 20 and P117 pins 1 and 2 October 2010 50PK950 Plasma...
  • Page 74 Diode Check: 1.32V T302 Tip: M5V turns on this supply. D301, D313 18V Source Cathode Top Side Just above T301 D303 FG10V Source D302 FG24V Source Tip: Use FS301 to check Cathode left side this supply. T301 October 2010 50PK950 Plasma...
  • Page 75 10A / 125V Diode Check 1.295V With Board Disconnected. 0.948V with board connected. 18V Pins 47 through 50 FS104 (18V) M5V Pins 42 through 46 2A / 125V Diode Check 1.32V With Board Disconnected. 1.06V with board connected. October 2010 50PK950 Plasma...
  • Page 76 P114 Connector "Y-SUS" to "X-Drive” Left P121 Label Diode Mode *60V Open P114 * Note: This voltage will vary in accordance with Panel Label Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 77 DATA_T 2.82V 3.0V 2.03V 2.82V SUS_DN 2.46V 2.82V SUS_UP 0.12V 2.83V Open 41-45 4.92V 1.3V Diode Mode Readings ER_DN 0.12V 2.82V taken with all connectors Disconnected. 47-50 18.3V 1.32V DVM in Diode Mode. ER_UP 1.14V 2.83V October 2010 50PK950 Plasma...
  • Page 78 2.1V Q404 Reverse: 1.37V Q407 1.9V Reverse: Open Reverse: Open Blk Red RF2001 Shown: Shorted Shown: 0.35V Shown: 0.35 D406, D407, D408 D413, D420, D421, Reverse: Shorted Reverse: Open Reverse: Open D412 0.3 Ohms Blk Red October 2010 50PK950 Plasma...
  • Page 79 P113 Identification and Identification and D412 D413 Location Location P117 Q414 Q415 Q304 D416 D420 Q421 Q420 Q405 Q409 Q423 C325 Q408 Q413 Q422 Q412 Q411 P118 D408 D421 D406 D407 P101 Q302 Q404 Q407 P114 October 2010 50PK950 Plasma...
  • Page 80 Scanning is synchronized by receiving Logic scan signals from the Control board. The 50PK950 uses 12 Driver ICs on 2 Y-Drive Boards commonly called “Y-Drive Buffers” but are actually Gate Arrays. October 2010...
  • Page 81 Warning: Never run the Y-SUS with just P109 disconnected. You must remove the Upper Y-Drive board completely due to these FG lugs. P109 Floating Ground Standoff The Floating Ground Standoff delivers FG To the Y-Drive Boards. There are 3 per/board. October 2010 50PK950 Plasma...
  • Page 82 Y-Scan signal, FG5V from the Y-SUS board and Logic Signals from the Control board through the This connector does not Y-SUS are supplied to the Lower Y-Drive Board come with a new on Connector P209. Y-SUS or Y-Drive. PANEL Y-SUS SIDE SIDE October 2010 50PK950 Plasma...
  • Page 83 Y-Drive Upper. 13) OC2 12) FGnd 11) OC2 10) FGnd 09) Data 08) FGnd 07) n/c 01-06) Y-Scan Y-SUS Board Y-Drive Upper (4mSec per/div) Y-Drive Connected 432~446V p/p Floating Gnd Y-Drive Removed 428V p/p October 2010 50PK950 Plasma...
  • Page 84 Gnd to Floating Gnd TP 01-06) Y-Scan 150V without an Isolation Transformer. All logic pins about (432V p/p) Y-SUS Board Y-Drive Upper P109 Pins 9, 11, 13, 15, 17 are Logic (Drive) Signals to the Y-Drive Upper. October 2010 50PK950 Plasma...
  • Page 85 11) OC2 2.83V 0.77V 10) FGnd FGnd FGnd 09) Data 2.83V 0.77V 08) FGnd FGnd FGnd Floating 07) Open Open Open 4-6) VPP Open 1.04V 1-3) VSC Open 1.58V Y-Drive Meter in the Upper Diode Mode October 2010 50PK950 Plasma...
  • Page 86 Y-Drive Lower. 09) Data 10) FGnd 11) OC2 12) FGnd 13) OC1 14) FGnd 15) STB 16) FGnd 17) CLK 18) n/c 19-20) FG5V (4mSec per/div) Y-Drive Connected 432~446V p/p Y-SUS Board Y-Drive Lower October 2010 50PK950 Plasma...
  • Page 87 Gnd to Floating Gnd TP 18) n/c without an Isolation Transformer. 19-20) FG5V 5.06V All logic pins about (432V p/p) Y-SUS Board Y-Drive Lower P209 Pins 9, 11, 13, 15, 17 are Logic (Drive) Signals to the Y-Drive Lower. October 2010 50PK950 Plasma...
  • Page 88 FGnd FGnd P209 13) OC1 2.83V 0.77V 14) FGnd FGnd FGnd 15) STB Open 0.77V 16) FGnd FGnd FGnd 17) CLK 2.83V 0.77V 18) n/c 19-20) FG5V Open 0.39V Y-Drive Lower Meter in the Diode Mode October 2010 50PK950 Plasma...
  • Page 89 To reinstall the Ribbon Cable, carefully slide it back into the slot see ( Fig 3 ), be sure the Tab is seated securely and press the Locking Tab back to the locked position see ( Fig 2 then Fig 1). October 2010 50PK950 Plasma...
  • Page 90 Note the cable is crooked in this case because the Tab on the Ribbon cable was improperly seated at the top. This can cause bars, lines, intermittent lines abnormalities in the picture. Remove the ribbon cable and re-seat it correctly. October 2010 50PK950 Plasma...
  • Page 91 FRONT SIDE OF Y-DRIVE BOARD 8 Ribbon cables communicating with the Panel’s (Horizontal Electrodes) totaling 1080 lines determining the Panel’s Vertical resolution pixel count. Any of these output lugs can be tested. Look for shorts indicating a defective Buffer IC October 2010 50PK950 Plasma...
  • Page 92 • DC Voltage and Waveform Test Points • Z BIAS Alignment • Diode Mode Test Points Operating Voltages Operating Voltages Power Supply Supplied VS M5V Routed through Control Board Y-SUS Supplied 18V Routed through Control Board Developed on Z-SUS Z Bias October 2010 50PK950 Plasma...
  • Page 93 Control board Receives Logic Signals Via 3 FPC Circuits generate erase, Flexible Generates Z Bias 100V Printed sustain waveforms Circuits NO IPMs FET Makes Drive waveform Display Simplified Block Diagram of Z-SUS (Sustain) Board Panel October 2010 50PK950 Plasma...
  • Page 94 M5V from SMPS to the FETs Waveform Y-SUS, +18V generated on the Y-SUS are routed Development Z-SUS through the Control board. FETs Waveform Logic Signals generated Development P103 on the Control board. FETs To Z-SUB P106 P107 October 2010 50PK950 Plasma...
  • Page 95 50PK950 Z-SUS Board Drawing 50PK950 Z-SUS Board Drawing Example: D213 Model : PDP 50R1### FS103 Voltage Setting: 5V/ Va:60/ Vs:203 D207 6.3A / 250V N.A. / -190 / 150 / N.A. / 115 (VS) Max Watt : 450 W (Full White)
  • Page 96 TIP: The Z-Bias (VZB) Adjustment is a DC level adjustment. This is only to show the effects of Z-Bias on the waveform. This Waveform is just for reference to observe the effects of Z Bias adjustment October 2010 50PK950 Plasma...
  • Page 97 Location Top Right of Z-SUS Board Set should run for 10 minutes, this is the “Heat Run” mode. Set screen to “White Wash” mode or 100 IRE White input. Adjust VZ (Z-Bias) to Panel Label (± 1/2V) October 2010 50PK950 Plasma...
  • Page 98 Diode Mode *202V Open *60V 9-10 * Note: This voltage will vary in accordance with Panel Label There are no Stand-By voltages on this connector Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 99 VZB2 2.50V 2.83V ER_DN 0.13V 2.83V Pin 1 VZB1 2.83V ER_UP 0.09V 2.83V ZBIAS 1.90V 2.83V There are no Stand-By voltages on this connector Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 100 Reverse: Open Reverse: Short Reverse: Open Q205-Q206 Blk Red Blk Red RF2001 Shown: Short Shown: 0.35V Shown: Open D208,~D210 D209~D211 Reverse: Short Reverse: Open Reverse: 0.35V D221~D216 0.1 Ohms D215 D207-D213 Blk Red Blk Red D220-D203 October 2010 50PK950 Plasma...
  • Page 101 1 or 2 on P2 on Control Board The Power Supply should be producing 17V or you can substitute voltage matching 17V from an external source to either pins 1 or 2 on connector P2 on the Control board. October 2010 50PK950 Plasma...
  • Page 102 Y-SUS Supplied +5V (M5V) Developed on the SMPS +18V (Routed to the Z-SUS) (Not used by the Control Board) Developed on the Control Board +1.8V for internal use +3.3V for internal use +3.3V for the X-Boards (TCPs) October 2010 50PK950 Plasma...
  • Page 103 Control Board Component Identification Control Board Component Identification p/n: EBR63526901 October 2010 50PK950 Plasma...

  • Page 104: Control Board

    50PK950 Control Board Layout Drawing 50PK950 Control Board Layout Drawing 18V To Z-SUS (In P1 pins 1-4) (Out P2 pins 14-15) Grayed Out Components are Diode Check All Connectors on the Back of the Board Connected 1.058V 14-15) 18V 18.3V...
  • Page 105 Control Board Temperature Sensor Location (Chocolate) BACK SIDE OF With Chocolate THE BOARD (Heat Transfer Material) IC103 CONTROL 04) 3.3V 03) Gnd BOARD 05) Gnd 02) Gnd TEMPERATURE 06) 3.3V 01) 3.3V SENSOR LOCATION Pin 1 October 2010 50PK950 Plasma...
  • Page 106 Y-Scan or the Z-Drive signal. VS_DA AUTO Auto Gen (Internal Automatic Generator) Short these two pins together to generate patterns on the screen for a Panel Test. If patterns do not appear, try removing the LVDS Cable. October 2010 50PK950 Plasma...
  • Page 107 Check the output of the Oscillator (Crystal) X1. Osc. Check: 25Mhz Top Leg The frequency of the sine wave is 25 MHZ. Missing this clock signal will halt operation of the panel drive signals. Osc. Check: 25Mhz Bottom Leg CONTROL BOARD CRYSTAL LOCATION October 2010 50PK950 Plasma...
  • Page 108 2 Buffer MCM IC201 Outputs There are 23 total TCPs. per TCP 5760 Vertical Electrodes 128 Lines per Buffer To Left 1920 Total Pixels (H) X-Board 256 Lines output Total To Center To Right X-Board X-Board October 2010 50PK950 Plasma...
  • Page 109 Y-SUS to the Y-Drive boards). Note: The +18V is not used by the Control board, it is routed to the Z-SUS leaving on P2 Pins 14~15. Starting at pin 16 every pin not identified is ground. October 2010 50PK950 Plasma...
  • Page 110 D_VY_EN 0.26V 3.0V OC1_B 1.12V 2.82V SET_UP2 2.82V SET_UP1 0.88V 2.82V 2.87V 2.84V SET_DN3 2.36V 2.83V 0.384V 2.83V SET_DN2 2.12V 2.84V SET_DN1 2.12V 2.84V Open PASS 2.03V 2.84V CTRL_EN 0.09V 3.17V Error Open ER_UP 1.14V 2.83V October 2010 50PK950 Plasma...
  • Page 111 Example of LVDS Video Signal LVDS Example of Normal Signals measured at 1V p/p at 10µSec Pins 12~17, 19~20, 22~33, 35~36, 38~43. Pins 19~20 and 35~36 are clock signals for the data. Pins are close together. October 2010 50PK950 Plasma...
  • Page 112 TB1- 1.2V 1.0V 3.28V Open TB0+ 1.1V 1.0V PC_SER_DATA 3.29V Open TB0- 1.3V 1.0V PC_SER_CLK 3.3V Open 26-27 TA4+ 1.1V 1.0V TA4- 1.3V 1.0V * Indicates video signal Note: There are no voltages in Stand-By mode. October 2010 50PK950 Plasma...
  • Page 113 CTRL_EN 0.40V Open SUS_UP 0.15V Open VZB2 2.50V Open ER_DN 0.128V Open VZB1 Open ER_UP 0.087V Open ZBIAS 1.90V Open Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 114 SMPS, Y-SUS and Control Board. Each EMI filter has 4 pins as shown in the example. The left and right are the B+ route, the two side solder points are Chassis Gnd. FL1, FL2 and FL5 (5V EMI filters) October 2010 50PK950 Plasma...
  • Page 115 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V 0.5V 1.2V 1.0V 0.97V 0.5V 1.2V 1.27V 0.97V 3.24V 1.2V 1.0V 0.97V 1.83V 1.2V 1.27V 0.97V 1.86V 1.2V October 2010 50PK950 Plasma...
  • Page 116 1.27V 0.97V 1.86V 1.2V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V Note: 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V There are no voltages in 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V Stand-By mode. 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V October 2010 50PK950 Plasma...
  • Page 117 1.27V 0.97V 1.86V 1.2V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V Note: 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V There are no voltages in 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V Stand-By mode. 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V October 2010 50PK950 Plasma...
  • Page 118 Control board develops 3.3V (IC53) and routes to each X • Control board develops 3.3V (IC53) and routes to each X Board via ribbon connectors P110, P210 and P310. Board via ribbon connectors P110, P210 and P310. October 2010 50PK950 Plasma...
  • Page 119 • The X boards have connectors to 23 TCPs, 8 on the left and right. The Center X board has connections to 7 TCPs. There are a total of 23 TCPs and each TCP has 2 buffers, so there are a total of 46 buffers feeding the panel’s 5760 vertical electrodes. October 2010 50PK950 Plasma...
  • Page 120 The Vertical Address The Vertical Address buffers (TCPs) have buffers (TCPs) have one heat sink one heat sink indicated by the arrow. indicated by the arrow. It protects all 23 TCPs. It protects all 23 TCPs. October 2010 50PK950 Plasma...
  • Page 121 On 3.3V (0.66V) TCPs connected. On 3.3V (0.33V) TCPs disconnected. On 3.3V (0.66V) TCPs disconnected. On any EC (Open) TCPs connected. On any EC (Open) TCPs connected. On any EC (Open) TCPs disconnected. On any EC (Open) TCPs disconnected. October 2010 50PK950 Plasma...
  • Page 122 X Drive Board Y-SUS Board Logic Control Board 3.3V Chocolate 256 total lines 128 lines 128 lines Taped Carrier Package 256 Vertical Electrodes Long Black Attached directly Heat Sink to Flexible cable Back side of TCP Ribbon October 2010 50PK950 Plasma...
  • Page 123 TCP Testing TCP Testing 50PK950 X Board TCP Connector Distribution Any X Board to Any TCP P101~P108 or P201~P207 or P301~P308 Va: Comes from Y-SUS P114 1~4 3.3V Origination Va: Comes In on: From Control board Left X : P121 pins 1~4 IC53 center leg.
  • Page 124 There will be two small feed troughs', (TP) you can use for Test Points. Example here from P203. You can only check for continuity back to IC53, you can not run the set with heat sink removed. October 2010 50PK950 Plasma...
  • Page 125 Cause a “Single Pixel Width Line” defect. The line can be Red, Green or Blue. e) A dirty contact at the connector can cause b, c and d also. “TCP” Taped Carrier Package Look for burns, pin holes, damage, etc. October 2010 50PK950 Plasma...
  • Page 126 Open * Note: This voltage will vary in accordance with Panel Label. There are no Stand-By voltages on this connector. Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 127 1.27V Open 1.27V Open 1.0V Open 1.0V Open 1.0V Open Open 1.27V Open 1.27V Open 1.27V Open 57~60 3.3V Open Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 128 1.27V Open 1.27V Open 1.0V Open 1.0V Open 1.0V Open Open 1.27V Open 1.27V Open 1.27V Open 57~60 3.3V Open Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 129 1.27V Open 1.27V Open 1.0V Open 1.0V Open 1.0V Open Open 1.27V Open 1.27V Open 1.27V Open 57~60 3.3V Open Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 130 There are no Stand-By voltages on this connector. P220 Center X P120 Left X P320 Right X P221 Center X Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 131 On Va (0.42V) all connectors connected. connected. On Va (Open) Y-SUS connector On Va (0.42V) Y-SUS connector removed, TCPs connected. removed, TCPs connected. On Va (Open) all connectors removed, On Va (0.5V) all connectors removed, TCPs disconnected. TCPs disconnected. October 2010 50PK950 Plasma...
  • Page 132 Distributes Key 1 and Key 2 to the Front IR Board then to the Front Key Pad. • Receives Intelligent Sensor data from the Front IR Board (via SCL/SDA). • Drives front Power LEDs. • Distributes +3.3V_ST to the Front IR Board. October 2010 50PK950 Plasma...
  • Page 133 SMPS P902 P900 LVDS P700 IC701 Microprocessor P703 to Ft IR SW700 IC501 Video Processor Reset USB 1 RS232 USB 2 P300 Audio Audio HDMI TU1400 Optical Tuner Remote Audio Dongle Cat5 Rear Remote HDMI Inputs October 2010 50PK950 Plasma...
  • Page 134 50PK950 Main Front Layout Drawing 50PK950 Main Front Layout Drawing P400 Main to P813 SMPS Label STBY Run Diode P1001 L406 P400 IC401 1, 2 17.3V IC405 Open P702 IC404 IC400 3, 4 10MHz 5, 7 0.4V 5.17V X701 1.21V...
  • Page 135 50PK950 Main Board Front Side Component Voltages IC400 3.3V_NEC_ST IC403 A2.5V IC405 D1.2V / A1.2V IC705 NVRAM Regulator Regulator Regulator [1] Gnd [1] 1.26V [1] Gnd [1] Gnd [2] 3.3V [2] 2.5V [2] 4.99V [2] Gnd [3] 5V [3] 5V...

  • Page 136: Main Board

    50PK950 Main Back Layout Drawing 50PK950 Main Back Layout Drawing IC1001 IC700 IC606 IC604 IC602 Q500 Q200 D200 IC707 MAIN BOARD p/n: EBT60955910 p/n: EBT60955910 50PK950-UA AUSALHR p/n: EBR68027905 50PK950-UA AUSALJR Other Main Boards Used: p/n: EBT60955914 50PK950-UA AUSALUR p/n: EBT60955914 50PK950-UA AUSLLUR...
  • Page 137 50PK950 Main Board Back Side Component Voltages IC100 RS232 Control IC700 Micro EEPROM IC704 RS232 Selector IC1001 Motion Remote Q201 Hot Swap HDMI1 Q207 Hot Swap HDMI4 [1] 1.65V [1] Gnd [1] 3.26V [1] 0V (3.3V M_Remote Used) [B] 4.27V [B] 4.28V...
  • Page 138 17-18 Test Point B+ (3.3V) B+ (1.26V) Analog Video Pins Test Point SIF Pin Audio Test Point Data Pin Clock Pin Tuner B+ (5V) TU1400 (Back bottom left hand side) TU1400 (Front bottom right hand side) October 2010 50PK950 Plasma...
  • Page 139 You must use the back of the board for Test Points. Only present during Channel Change To keep the Data and Clock lines running so they can Main Board be measured easily, place the unit into “Auto Tuning”. October 2010 50PK950 Plasma...
  • Page 140 Video” Signal Tuner Location 500mV / 10uSec Pin 9 “SIF” Signal 450mVp/p 700mVp/p 200mV / 2uSec Note: Pin 17 and Pin 18 “Dig IF” Signal 8VSB or QAM Only when receiving a Digital Channel. 100mV / 1uSec October 2010 50PK950 Plasma...
  • Page 141 X701 1.5V X900 X900 Top Side 312mV p/p X900 54Mhz Bottom Leg 328mV p/p 1.495V Very Noisy MAIN Board Reading this X900 Runs only during “On” Crystal Location Crystal may (Overtone Crystal) cause video lock up October 2010 50PK950 Plasma...
  • Page 142 (2) Pull the Cable from the (2) Pull the Cable from the Connector Connector October 2010 50PK950 Plasma...
  • Page 143 Note: If the AC Det line is Missing, the TV will not turn on. (Relays will click, then no functions. LOGO stays on). Note: Pin 18 is grounded on the Main board. If this line is floated, the SMPS turns on Automatically when AC is applied. October 2010 50PK950 Plasma...
  • Page 144 1.77V 7 & 8 0.77V 3.28V 1.76V Intelligent 0.77V 3.28V 1.76V Sensor 3.3V_ST 3.29V 3.28V 1.13V Stand-By 3.3V 3.3V_MULTI 0.41V 5.18V 1.22V LED-WHITE 1.65V Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 145 8.44V Open 8.44V Open Main Board Location IC300 IC300 Audio Amp Audio Amp Right (-) P300 Right (+) Speaker Left (-) Connector Left (+) Diode Mode Check with the Board Disconnected. DVM in the Diode mode. October 2010 50PK950 Plasma...
  • Page 146 Main Board P902 LVDS Video Signal Test Points Main Board P902 LVDS Video Signal Test Points Waveforms Taken from P902 pins 11 and 12, but there are actually 24 pins carrying video. Input Signal SMPT Color Bar Main Board P902 Location MAIN Board October 2010 50PK950 Plasma...
  • Page 147 1.0V 3.28V Open There are no voltages in TB0+ 1.1V 1.0V PC_SER_DATA 3.29V Open Stand-By mode. TB0- 1.3V 1.0V PC_SER_CLK 3.3V Open 25-26 TA4+ 1.1V 1.0V Diode Mode Check with the Board Disconnected. TA4- 1.3V 1.0V October 2010 50PK950 Plasma...
  • Page 148 * 3V When the LOGO LED is On. RF_Reset 2.99V 2.36V This line gradually goes high to turn on and down when going off. 3.1V 1.72V 3.1V 1.72V Diode Mode values taken with all Connectors Removed October 2010 50PK950 Plasma...
  • Page 149 The Front Power LEDs are driven by 2 separate pins from the Main board SCL/SDA pins 7 and 8. The IR signal is routed back to the Main Board via pin 1. Also, the Motion Remote routes it’s output signal back to the Main Board P1001 pin 4. October 2010 50PK950 Plasma...
  • Page 150 When properly seated, the ribbon will be under the two plastic tabs in the connector. October 2010 50PK950 Plasma...
  • Page 151 Right G: Ground 3.24V V: B+ 2.85V O: Output Q101 Red On in Stand-By The Green LEDs come on during power on, but Q102 Green On in Run turn off shortly after the set comes on. October 2010 50PK950 Plasma...
  • Page 152 1.739V 3.3V For Readings when any Key is touched, see Soft Key Pad Section For Key 1 and Key 2. Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 153 Voltage and Diode Mode Measurements for the Main Board P101 CONNECTOR “Ft IR Board" to "Ft Key Pad” STBY Diode Mode Open Open Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. October 2010 50PK950 Plasma...
  • Page 154 P1001 and on to the IC1001 where the signal is then routed to the BCM IC for pointer positioning and interpretation of the other functions. Motion Remote “Magic Remote” AKB73035402 October 2010 50PK950 Plasma...
  • Page 155 “Motion Remote" to “Main Board“ P1001 Motion Remote Diode Label STBY Check +3.3V 3.33V 1.17V M_REMOTE_RX 3.3V 1.95V M_REMOTE_TX 3.3V 1.95V RF_Reset 2.99V Open 3.1V 1.96V 3.1V 1.96V Diode Mode values taken with all Connectors Removed October 2010 50PK950 Plasma...
  • Page 156 Key 1 or Key 2 line which is then interpreted by the Microprocessor in the Main board IC701. IC100 P101 static sensitive Front the static key press sensitive key pad decoder Button Identification for the Front the static sensitive key pad October 2010 50PK950 Plasma...
  • Page 157 The Soft Touch Key Pad is a thin “Static” sensitive pad that is adhered to the inside of the front protective shield. Plastic Frame Lifted up slightly P101 Ribbon Cable Soft Touch Key Pad Front Glass Shield The bottom decorative plastic piece has been removed. October 2010 50PK950 Plasma...
  • Page 158 P100 Connector “IR/LED Control Board“ to P703 “Main” (No Key Pressed) Diode Mode Label STBY Diode Mode Readings taken with all connectors KEY 1 3.14V 3.14V 1.83V Disconnected. Black lead on Gnd. DVM KEY 2 3.28V 3.28V 1.83V in Diode Mode. October 2010 50PK950 Plasma...
  • Page 159 Invisible Speaker System Overview (Full Range Speakers) Invisible Speaker System Overview (Full Range Speakers) p/n: EAB60962801 The 50PK950 contains the Invisible Speaker system. The Full Range Speakers point downward, so there are no front viewable speaker grills or air ports. Installed View...
  • Page 160 When Printing the Interconnect diagram, print from the Adobe When Printing the Interconnect diagram, print from the Adobe version and print onto 11X17 size paper for best results. version and print onto 11X17 size paper for best results. October 2010 50PK950 Plasma...
  • Page 161 50PK950 (50R1 Panel) CIRCUIT INTERCONNECT DIAGRAM 50PK950 (50R1 Panel) CIRCUIT INTERCONNECT DIAGRAM 67VAC rms “White” NOTE: Diode tests are conducted with the board disconnected. P811 to Z-SUS and P812 to Y-SUS Z-SUS Signal VR402 81VAC rms “Black” Connect Scope 320V p/p ± 5V SMPS Test –...
  • Page 162 50PK750 Main Board Component Voltages 50PK950 Main Board (Front Side) Component Voltages IC400 3.3V_NEC_ST IC402 D3.3V / +3.3V IC404 7V (to IC405) IC405 D1.2V / A1.2V IC705 NVRAM IC1102 USB2 5V Q901 SDA to LVDS Regulator Regulator Regulator Regulator [1] Gnd [1] 5V [1] 17.1V...
  • Page 163 50PK950 LVDS Control Board P31 from P902 Main Board Waveforms P31 LVDS (Pin 12) 5Msec / 728mV P31 LVDS (Pin 14) 5Msec / 618mV P31 LVDS (Pin 16) 5Msec / 738mV P31 LVDS (Pin 19) 5Msec / 758mV Main Control...

  • Page 164: Thank You

    End of Presentation End of Presentation This concludes the Presentation Thank You October 2010 50PK950 Plasma...