P64x
4
CIRCUIT BREAKER FAIL LOGIC
Any Trip
Extern CB1 Trip
T1 IA< Start
T1 IB< Start
T1 IC< Start
T1 IN< Start
V<1 Trip
V>1 Trip
VN>1 Trip
F>1 Trip
F<1 Trip
CLI1 Trip
RTD 1 Trip
Top Oil >1 Trip
Hot Spot >1 Trip
Volt Prot Reset
Prot Reset & I<
I< Only
CB Open & I<
CB1 Closed
Volt Prot Reset
Prot Reset & I<
I< Only
CB Open & I<
Extern CB1 Trip
V00694
Figure 107: Circuit Breaker Fail Logic - part 1
P64x-TM-EN-1.3
1
S
Q
R
&
&
S
R
1
&
1
&
&
1
&
&
1
&
&
1
&
1
Q
1
Note on SR Latches
All latches are reset dominant and are triggered on the
S
positive edge . If the edge occurs while the reset is active ,
Q
the detection of the edge is delayed until the reset
R
becomes non -active.
Chapter 10 - CB Fail Protection
Trip State
Reset State
231