Sony STR-DN1000 Service Manual page 75
Multi channel av receiver
Hide thumbs
Also See for STR-DN1000:
- Operating instructions manual (136 pages) ,
- Quick setup manual (2 pages) ,
- Specification sheet (2 pages)
Table of Contents
Advertisement
QQ
3 7 63 1515 0
Pin No.
Pin Name
K1
K2
K3
K4
K5
K6 to K11
K12
K13
UHPI_HD[0]
K14
UHPI_HD[1]
K15
K16
L1
UHPI_HD[30] to
L2 to L4
UHPI_HD[28]
L5 to L12
UHPI_HD[3],
L13, L14
UHPI_HD[4]
L15, L16
EM_A[4], EM_A[3]
M1
M2
M3
UHPI_HD[27]
M4
M5
M6 to M11
M12
M13
TE
L 13942296513
M14
UHPI_HD[2]
M15, M16
EM_A[6], EM_A[5]
N1
UHPI_HD[25],
N2, N3
UHPI_HD[26]
N4
EM_D[22]
N5
EM_D[18], EM_D[16],
N6 to N11
EM_D[30], EM_D[29],
EM_D[27], EM_D[25]
N12
UHPI_HD[5],
N13, N14
UHPI_HD[6]
N15, N16
EM_A[8], EM_A[7]
P1
P2
UHPI_HD[24]
EM_D[21] to EM_D[19],
P3 to P7
EM_D[17], EM_D[31]
P8
EM_D[28], EM_D[26],
P9 to P11
EM_D[24]
P12
EM_A[12]
P13
EM_DQM[2]
P14
UHPI_HD[7]
P15
EM_A[11]
P16
www
R1
R2
EM_D[23]
R3
EM_CAS#
.
R4
EM_DQM[0]
http://www.xiaoyu163.com
I/O
VSS
-
Ground terminal
PLLHV
-
Power supply terminal (+3.3V) (for PLL)
TMS
I
Test mode selection signal input terminal (for JTAG)
TRST#
I
Test reset signal input terminal (for JTAG)
CVDD
-
Power supply terminal (+1.26V) (for core)
VSS
-
Ground terminal
CVDD
-
Power supply terminal (+1.26V) (for core)
O
Reset signal output tarminal
O
Mode setting output tarminal
EM_A[2]
O
Address signal output to the SD-RAM
VSS
-
Ground terminal
TDI
I
Test data input terminal (for JTAG)
I/O
Not used
VSS
-
Ground terminal
I/O
Not used
O
Address signal output to the SD-RAM
EMU[0]#
I/O
Emulation terminal
TDO
O
Test data output terminal (for JTAG)
I/O
Not used
DVDD
-
Power supply terminal (+3.3V) (for IO)
VSS
-
Ground terminal
CVDD
-
Power supply terminal (+1.26V) (for core)
VSS
-
Ground terminal
DVDD
-
Power supply terminal (+3.3V) (for IO)
O
LED drive signal output terminal (for MULTI CHANNEL DECODING)
O
Address signal output to the SD-RAM
EMU1#
I/O
Emulation terminal
I/O
Not used
I/O
Two-way data bus with the SD-RAM
DVDD
-
Power supply terminal (+3.3V) (for IO)
I/O
Two-way data bus with the SD-RAM
DVDD
-
Power supply terminal (+3.3V) (for IO)
I/O
Not used
O
Address signal output to the SD-RAM
TCK
I
Test clock signal input terminal (for JTAG)
I/O
Not used
I/O
Two-way data bus with the SD-RAM
DVDD
-
Power supply terminal (+3.3V) (for IO)
I/O
Two-way data bus with the SD-RAM
O
Address signal output terminal
O
Byte enable signal output to the SD-RAM
I/O
Not used
O
Address signal output terminal
EM_A[9]
O
Address signal output to the SD-RAM
DVDD
-
Power supply terminal (+3.3V) (for IO)
x
ao
I/O
Two-way data bus with the SD-RAM
y
O
Column address strobe signal output to the SD-RAM
i
O
Byte enable signal output to the SD-RAM
http://www.xiaoyu163.com
8
Q Q
3
6 7
1 3
Not used
Not used
u163
.
2 9
9 4
2 8
Description
1 5
0 5
8
2 9
9 4
m
co
STR-DN1000
9 9
2 8
9 9
75
Hide quick links:
Advertisement
Table of Contents
