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Hardware Information
Parallel Port
8
8-10
The parallel port (LPT1) on the PG 720 has the following pinout:
Figure 8-6
LPT1 Parallel Port
Table 8-8
Pinout Table of the Parallel Port
Pin No.
Signal Description
1
/Strobe
2
Data - bit 0
3
Data - bit 1
4
Data - bit 2
5
Data - bit 3
6
Data - bit 4
7
Data - bit 5
8
Data - bit 6
9
Data - bit 7
10
/ACK (Acknowledge)
11
BUSY
12
PE (PAPER END)
13
SELECT
14
/AUTO FEED
15
/ERROR
16
/INIT
17
/SELECT IN
18
GND
:
25
GND
1
14
25
13
Input/Output
Output (open collector)
Output (TTL level)
Output (TTL level)
Output (TTL level)
Output (TTL level)
Output (TTL level)
Output (TTL level)
Output (TTL level)
Output (TTL level)
Input (4.7 k
pull up)
Input (4.7 k
pull up)
Input (4.7 k
pull up)
Input (4.7 k
pull up)
Output (open collector)
Input (4.7 k
pull up)
Output (open collector)
Output (open collector)
–
–
PG 720 Programming Device
C79000-G7076-C720-02
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