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7-4.
BLOCK DIAGRAM – VIDEO Section –
SD0 – SD7
D
(Page 32)
AV DATA BUS
XDCK, XSAK,
SDEF
XDCK
F
183 SDCLK
(Page 32)
XSAK
179 SDEN
SDEF
182 SDERROR
27M
(Page 32)
I
139 XIN
XSRQ_ZIAV
L
178 SDREQ
(Page 32)
SPDIF
O
(Page 33)
156 IEC958
ZIVARESET
V
(Page 34)
202 RESET
TDOSA, TDISA,
TCK, TMS, TRST
TDOSA
N
(Page 33)
199 TDI
TDISA
198 TDO
TCK
201 TCK
TNS
200 TMS
TRST
197 TRST
I2HLP,
I2CDATA, I2CCLK
I2HLP
W
106 I2C_CTRL
(Page 34)
161
160
186
I2CDATA
I2CCLK
78
79
34
41
40
X301
20MHz
J205 (3/4)
VIDEO 1
VIDEO IN
VIDEO INPUT
SELECTOR
J206 (2/3)
IC207
VIDEO 2
VIDEO IN
1 IN1
3 IN2
OUT
VDAC_0
131
5 IN3
2 4
VDAC_2
125
128
VDAC_1
VDAC_3
122
119
VDAC_4
187
185
184
188
146 158
157
191
1 8 3
6 DO
5 DI
4 SK
EEPROM
IC203
Q302
FLIP-FLOP
SWITCHING
IC803
IC802
33
35
36
37
32
38
MECHANISM CONTROLLER
IC301 (2/2)
VIDEO SELECTOR
IC209
75Ω DRIVER
7
14 2B
OUT2
5
IC206
9 3B
OUT3
6
1 1B
OUT1
3
12 7
2
DVD SYSTEM PROCESSOR
IC206
HAD0 – HAD15
HA1 – HA3
22, 19-14, 11-3
2, 207, 206
190
HAD0 – HAD15
HA1 – HA3
DATA & ADDRESS BUS
HAD0 – HAD15
HA1 – HA3
55, 54, 52, 51,
34, 33, 31
56 29
49-47, 45-40, 38-36
2D7 – 2D9
1D1 – 1D10, 2D1 – 2D6
BUS INTERFACE
1Q1 – 1Q10, 2Q1 – 2Q8
IC215
2, 3, 5, 6, 8-10, 12-17,
19-21, 23, 24
DATA & ADDRESS BUS
HA1 –
HAD0 – HAD15
HA3
15-22, 24-31
11-9
2-8, 34-44
DQ0 – DQ15
A0 – A2
A3 – A20
16Mbit PROGRAMMABLE ROM
IC204
35
35
J205 (4/4)
VIDEO 1
VIDEO OUT
VIDEO AMP,
75Ω DRIVER
IC208
6 YIN
YOUT
28
WIDE SWITCH
2 CIN
COUT
33
Q210, 214
4
3
2
1
4 VIN
VOUT
31
VIDEO
12 CYIN
25
CYOUT
Y
14 CBIN
CBOUT
22
PB/CB
16 CRIN
CROUT
19
PR/CR
3
15
AV2
AV0
AV1
107
MD0 – MD31
MA0 – MA12
57-60, 64-71, 75-78,
195 27 25
42-33, 45, 46
81-84, 88-95, 99-102
2,4,5,7,8,10,11,13,74,76,77,79,82,83,85,31,
21, 24-27,
33,34,36,37,39,40,42,45,47,48,50,51,53,54,56
60-66
DQ0 – DQ31
A0 – A11
128Mbit SD-RAM
IC202
12 14 1
HCD-C770/C990
• SIGNAL PATH
: VIDEO
: Y
: CHROMA
: COMPONENT VIDEO
S VIDEO
J202
MONITOR OUT
J206 (3/3)
COMPONENT
VIDEO OUT
AV0 – AV2
P
(Page 33)
48
47
56
49
53
51
52
62
73
86
97
22
23
68
20
17
19
18
16
71
28
59
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