6.2.4.8 Host Terminating Write DMA
DMARQ
DMACK-
STOP
DDMARDY-
HSTROBE
DD(15:00)
Figure 41. Ultra DMA cycle timing chart (Host Terminating Write)
PARAMETER DESCRIPTION
(all values in ns)
Time from HSTROBE to edge
tSS
assertion of STOP
tLI
Limited interlock time
tMLI
Interlock time with minimum
CRC word setup time (at device
tCS
side)
CRC word hold time (at device
tCH
side)
tACK
Hold time for DMACK–
Maximum time before releasing
tIORDYZ
IORDY
Figure 42. Ultra DMA cycle timings (Host Terminating Write)
tLI
tSS
tLI
tLI
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MODE0
MIN
MAX
50
–
0
150
20
–
15
–
5
–
20
–
–
20
Deskstar 120GXP hard disk drive specifications
tMLI
tCS
Host drives DD
MODE1
MODE2
MIN
MAX
MIN
MAX
MIN
50
–
50
–
0
150
0
150
20
–
20
–
10
–
7
–
5
–
5
–
20
–
20
–
–
20
–
20
37
tACK
tIORDYZ
tACK
tCH
xxxxxxxxxx
CRC
MODE3
MODE4
MODE5
MAX
MIN
MAX
MIN
50
–
50
–
50
0
100
0
100
0
20
–
20
–
20
7
–
5
–
5
5
–
5
–
5
20
–
20
–
20
–
20
–
20
–
MAX
–
75
–
–
–
–
20