hit counter script
IBM EM78P221/2N Specification
  1. Manuals
  2. Brands
  3. IBM Manuals
  4. Network Card
  5. EM78P221/2N
  6. Specification
IBM EM78P221/2N Specification

IBM EM78P221/2N Specification

Ibm 8-bit microcontroller product specification
Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
EM78P221/2N
8-Bit Microcontroller
with OTP ROM
Product
Specification
D
. V
1.0
OC
ERSION
ELAN MICROELECTRONICS CORP.
October 2007

Advertisement

Table of Contents
loading

Related Manuals for IBM EM78P221/2N

Summary of Contents for IBM EM78P221/2N

  • Page 1 EM78P221/2N 8-Bit Microcontroller with OTP ROM Product Specification ERSION ELAN MICROELECTRONICS CORP. October 2007...
  • Page 2 Trademark Acknowledgments: IBM is a registered trademark and PS/2 is a trademark of IBM. Windows is a trademark of Microsoft Corporation. ELAN and ELAN logo © 2007 by ELAN Microelectronics Corporation Copyright All Rights Reserved Printed in Taiwan The contents of this specification are subject to change without further notice. ELAN Microelectronics assumes no responsibility concerning the accuracy, adequacy, or completeness of this specification.

  • Page 3: Table Of Contents

    Contents EM78P221/2N-V Package version... 1 EM78P221/2N-U Package version ... 1 General Description ... 2 Features ... 2 Pin Assignment ... 3 Pin Description... 4 EM78P222N ... 4 EM78P221N ... 5 Block Diagram ... 6 Function Description ... 7 Register Configuration... 7 Registers Description ...
  • Page 4 Contents 6.2.27 Bank 2-R8 (Operating Mode Control Register)...19 6.2.28 Bank 2-R9~RF (Reserve)...19 6.2.29 Bank 3-R5 (Timer Clock/Counter) ...19 6.2.30 Bank 3-R6 (IRC Control)-only for ICE ...20 6.2.31 Bank 3-R7 (Noise and LVR Control) - only for ICE ...21 6.2.32 Bank 3-R8~RF (Reserve)...21 6.2.33 R10 ~ R1F ...21 6.2.34 Banks 0~3 - R20 ~ R3F ...21 TCC/WDT and Prescaler...
  • Page 5 Absolute Maximum Ratings ... 53 DC Electrical Characteristics ... 53 Comparator (OP) Characteristic ... 55 AC Electrical Characteristic ... 55 Timing Diagrams ... 56 Package Type... 57 Packaging Configuration... 58 B.1 24-Lead Plastic Skinny Dual in line (SDIP) — 300 mil ... 58 B.2 24-Lead Plastic Small Outline (SOP) —...
  • Page 6 Contents Doc. Version Preliminary version Initial released version vi • Specification Revision History Revision Description (This specification is subject to change without further notice) Date 2007/03/20 2007/10/19 Product Specification (V1.0) 10.19.2007...

  • Page 7: Em78P221/2N-V Package Version

    Comparator Function WDT Time-out time (Prescaler = 1 : 1) Condition: VDD = 5V Code Option EM78P221/2N-V Package version Product Specification (V1.0) 10.19.2007 (This specification is subject to change without further notice) 8-Bit Microcontroller with OTP ROM Read Me First ! EM78P221/222N-V DC ~ 12MHz, 4.0V...

  • Page 8: General Description

    EM78P221/2N 8-Bit Microcontroller with OTP ROM General Description EM78P221N and EM78P222N are 8-bit microprocessors designed and developed with low-power and high-speed CMOS technology. Each device in the series has as an on-chip 4K×13-bit Electrical One Time Programmable Read Only Memory (OTP-ROM).

  • Page 9: Pin Assignment

    Product Specification (V1.0) 10.19.2007 (This specification is subject to change without further notice) 24-Pin DIP/SOP/SSOP P81//RESET P53/OSCI P52/OSCO P56/TCC P71/CO/INT1 P72/CIN+ P73/CIN- P77/INT0 Fig. 3-2 EM78P221NK/M/AM EM78P221/2N 8-Bit Microcontroller with OTP ROM P81//RESET P53/OSCI P52/OSCO P71/CO/INT1 P72/CIN+ P73/CIN- • 3...

  • Page 10: Pin Description

    EM78P221/2N 8-Bit Microcontroller with OTP ROM Pin Description 4.1 EM78P222N Symbol Pin No. 11~12 P50~P57 17~18 26~27 6 ~ 10 P60~P67 19 ~21 14 ~ 16 P70~ P77 22~25 13, 28 P80, P81 CIN- CIN+ OSCI OSCO /RESET 5, 24 INT0~INT1 4 •...

  • Page 11: Em78P221N

    If it remains at logic low, the device will be reset Wake-up from sleep mode when pin status changes Voltage on /RESET must not exceed Vdd during normal mode External interrupt pin Power supply Ground EM78P221/2N 8-Bit Microcontroller with OTP ROM Function • 5...

  • Page 12: Block Diagram

    EM78P221/2N 8-Bit Microcontroller with OTP ROM Block Diagram Instruction Register Instruction Decoder Fig. 5-1 EM78P221/2N Functional Block Diagram 6 • Ext. OSC. Oscillation 8-level stack Generation (13 bit) Interrupt R3 (Status Control Reg.) Register Interrupt Circuit Ext INT (This specification is subject to change without further notice) Int.

  • Page 13: Function Description

    RD (Pull-high Control Reserve Register) RE (WDT Control Reserve Register) RF (Interrupt Mask Reserve Register) General Registers General Registers (32×8 bits) (32×8 bits) EM78P221/2N Bank 3 Registers R5 (Timer Clock / Counter) Reserve* Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve...

  • Page 14: Registers Description

    EM78P221/2N 8-Bit Microcontroller with OTP ROM 6.2 Registers Description 6.2.1 A (Accumulator) Internal data transfer operation, or instruction operand holding usually involves the temporary storage function of the Accumulator. The Accumulator is not an addressable register. 6.2.2 CONT (Control Register)

  • Page 15: R0 (Indirect Addressing Register)

    Stack Level 2 Stack Level 3 Stack Level 4 Stack Level 5 Stack Level 6 Stack Level 7 Stack Level 8 Fig. 6-1 Program Counter Organization EM78P221/2N 8-Bit Microcontroller with OTP ROM Bit 3 Bit 2 Bit 1 “0” “0” 000H...

  • Page 16: R3 (Status Register)

    EM78P221/2N 8-Bit Microcontroller with OTP ROM "JMP" instruction allows direct loading of the lower 10 program counter bits. Thus, "JMP" allows PC to jump to any location within a Page (1K). "CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is pushed into the stack.

  • Page 17: R4 (Select Indirect Address)

    Bit 7 Bits 7 ~ 0 (P77 ~ P70): I/O data bits [With Simulator]: [With EM78P221/2N]: P73 ~ P72 are general input or output pins. 6.2.11 Bank 0-R8 (Port 8) Bit 7 Bits 7~6, 4~2, 0: not used, fixed to 0 all the time.

  • Page 18: Bank 0-Re (Wucr: Wake-Up Control Register)

    EM78P221/2N 8-Bit Microcontroller with OTP ROM 6.2.13 Bank 0-RE (WUCR: Wake-up Control Register) Bit 7 EX1IF Bit 7 (EX1IF): External interrupt flag. Set by INT1 pin, reset by software. Bits 6~5, 3, 1: not used bits, fixed to 0 all the time...

  • Page 19: Bank 1-R5 ~R7 (I/O Port Control Register)

    Bits 1~0 (C81~C80): 0 = defines the relative I/O pin as output With Simulator]: [With EM78P221/2N]: P80 is General input or output, but P81 is input or open-drain Product Specification (V1.0) 10.19.2007 (This specification is subject to change without further notice)

  • Page 20: Bank 1-R9 (Reserve)

    EM78P221/2N 8-Bit Microcontroller with OTP ROM 6.2.17 Bank 1-R9 (Reserve) Bits 7~0: not used, fixed to 0 all the time 6.2.18 Bank 1-RA (CMPCON: Comparator Control Register) Bit 7 EIS1 Bit 7 (EIS1): Bit 6 (EIS0): When EIS is "0," the path of /INT is masked. When EIS is "1," the status of /INT pin can also be read by way of reading Port 7 (Bank 0-R7).

  • Page 21: Bank 1-Rb (Pull-Down Control Register)

    Control bit used to enable the open-drain output of the P52 pin. Control bit used to enable the open-drain output of the P51 pin. Control bit used to enable the open-drain output of the P50 pin. EM78P221/2N 8-Bit Microcontroller with OTP ROM Bit 3...

  • Page 22: Bank 1-Rd (Pull-High Control Register)

    EM78P221/2N 8-Bit Microcontroller with OTP ROM 6.2.21 Bank 1-RD (Pull-high Control Register) Bit 7 /PH7 Bank 1-RD register is both readable and writable. Bit 7 (/PH7): Bit 6 (/PH6): Bit 5 (/PH5): Bit 4 (/PH4): Bit 3 (/PH3): Bit 2 (/PH2):...

  • Page 23: Bank 1-Rf (Interrupt Mask Register)

    ICIE bit must be set to “Enable“. TCIF interrupt enable bit 0 = Disable TCIF interrupt 1 = Enable TCIF interrupt EM78P221/2N 8-Bit Microcontroller with OTP ROM Bit 3 Bit 2 Bit 1...

  • Page 24: Bank 2-R5 (Hdcr: High Drive Control Register For Port 6)

    HD67 HD66 [With Simulator]: function nonexistent [With EM78P221/2N]: General I/O pins Bit 7 (HD67): Output High Drive Current Select for P67 Bit 6 (HD66): Output High Drive Current Select for P66 Bit 5 (HD65): Output High Drive Current Select for P65...

  • Page 25: Bank 2-R7 (Hscr2: High Sink Control Register For Port 6)

    HS67 HS66 [With Simulator]: function nonexistent [With EM78P221/2N]: General I/O pins. Bit 7 (HS67): Output High Sink Current Select for P67 Bit 6 (HS66): Output High Sink Current Select for P66 Bit 5 (HS65): Output High Sink Current Select for P65...

  • Page 26: Bank 3-R6 (Irc Control)-Only For Ice

    ICE220N Bits 7 ~ 2: [With Simulator (C3~C0, RCM1~RCM0)]: IRC calibration bits in IRC oscillator mode. [With EM78P221/2N]: Unimplemented, read as ‘0’. Bits 7 ~ 4 (C3 ~ C0): Bits 3 ~ 2 (RCM1 ~ RCM0): Bits 1 ~ 0: are not used, fixed to "0" all the time.

  • Page 27: Bank 3-R7 (Noise And Lvr Control) - Only For Ice

    ICE220N Bits 7 ~ 4: not used, fixed to "0" all the time. Bits 3 ~ 0: [With EM78P221/2N]: Unimplemented, read as ‘0’. [With Simulator]: Bit 3 (NRHL): The noise rejection function is turned off in the LXT2 and sleep mode.

  • Page 28: Tcc/Wdt And Prescaler

    EM78P221/2N 8-Bit Microcontroller with OTP ROM 6.3 TCC/WDT and Prescaler There are two 8-bit counters available as prescalers for the TCC and WDT. The PST0~PST2 bits of the CONT register are used to determine the ratio of the TCC prescaler, and the PWR0~PWR2 bits of the Bank 1-RE register are used to determine the WDT prescaler.

  • Page 29: I/O Ports

    8 to 1 MUX Prescaler TS (CONT) PSR2~0 (CONT) 8-bit Counter 8 to 1 MUX Prescaler PSW2~0 WDT Time out (Bank 1-RE) Fig. 6-2 TCC and WDT Block Diagram PCRD PCWR PDWR PDRD EM78P221/2N Data Bus TCC (R1) TCC overflow Interrupt • 23...
  • Page 30 EM78P221/2N 8-Bit Microcontroller with OTP ROM P77, /INT0 P71, /INT1 PORT EIS1,EIS0 Note: CO2, Pull-high and Open-drain are not shown in the figure. Fig. 6-4 I/O Port and I/O Control Register Circuit for P77 (/INT0) and P71 (/INT1) P60 ~ P67 PO RT Note: Pull-high (down) and Open-drain are not shown in the figure.

  • Page 31: Usage Of Port 6 Input Change Wake-Up/Interrupt Function

    4. Enable wake-up bit 5. Enable interrupt (Set BANK1-RF ICIE 6. Execute "SLEP" instruction (b) After wake-up 1. IF "ENI" → Interrupt vector (008H) 2. IF "DISI" → Next instruction EM78P221/2N 8-Bit Microcontroller with OTP ROM Interrupt ENI Instruction DISI Instruction Interrupt...

  • Page 32: Reset And Wake-Up

    EM78P221/2N 8-Bit Microcontroller with OTP ROM 6.5 Reset and Wake-up 6.5.1 Reset and Wake-up Operation A reset is initiated by one of the following events: 1. Power-on reset 2. /RESET pin input "low" 3. WDT time-out (if enabled) A device is kept in a reset condition for a duration of approximately 18ms reset is detected.
  • Page 33 The first two cases (1 & 2) will cause the EM78P221/2N to reset. The T and P flags of R3 can be used to determine the source of the reset (wake-up). Cases 3 & 4 are considered the continuation of program execution and the global interrupt ("ENI" or "DISI"...

  • Page 34: Wake-Up And Interrupt Modes Operation Summary

    EM78P221/2N 8-Bit Microcontroller with OTP ROM If Port 6 Input Status Change Interrupt is used to wake up the EM78P221/2N (as in Case b above), the following instructions must be executed before SLEP: BANK WDTC BANK ENI (or DISI) BANK...
  • Page 35 Next Instruction+ Set Bank 0-RE (CMPIF) Bit 0 = 1 ENI + Bank 1-RE (CMPIE) Bit 0 = 1 Interrupt Vector (0x08)+ Bank 0-RE (CMPIF) Bit 0 = 1 Reset (Address 0x00) Reset (Address 0x00) EM78P221/2N Normal Mode • 29...

  • Page 36: Register Initial Values After Reset

    EM78P221/2N 8-Bit Microcontroller with OTP ROM 6.5.1.2 Register Initial Values after Reset The following table summarizes the registers initialized values. Address Name Reset Type Bit Name Power-on CONT /RESET & WDT Wake-up from Pin Change Bit Name Power-on 0x00 R0 (IAR) /RESET &...
  • Page 37 Product Specification (V1.0) 10.19.2007 (This specification is subject to change without further notice) 8-Bit Microcontroller with OTP ROM Bit 7 Bit 6 Bit 5 Bit 4 NREN EX1IF ICWE EM78P221/2N Bit 3 Bit 2 Bit 1 Bit 0 CMPWE CMPIF EX0IF ICIF TCIF...
  • Page 38 EM78P221/2N 8-Bit Microcontroller with OTP ROM Address Name Reset Type Bit Name Power-on Bank 1-R8 /RESET & WDT Wake-up from Pin Change Bit Name Power-on Bank 1-R9 /RESET & WDT (Reserve) Wake-up from Pin Change Bit Name Power-on Bank 1-RA (CMPCON) /RESET &...
  • Page 39 Bit 4 HD67 HD66 HD65 HD64 HS57 HS56 HS55 HS54 HS67 HS66 HS65 HS64 TCC7 TCC6 TCC5 TCC4 EM78P221/2N Bit 3 Bit 2 Bit 1 Bit 0 EXIE ICIE TCIE HD63 HD62 HD61 HD60 HS53 HS52 HS51 HS50 HS63 HS62...

  • Page 40: Controller Reset Block Diagram

    EM78P221/2N 8-Bit Microcontroller with OTP ROM Reset Type Address Name Bit Name Power-on Bank 3-R7 0x07 (only for /RESET & WDT ICE) Wake-up from Pin Change Bit Name Power-on 0x10 ~ R10 ~ R1F /RESET & WDT 0x1F Wake-up from...

  • Page 41: The T And P Status Under Status Register

    Wake-up on pin changed during Sleep mode Product Specification (V1.0) 10.19.2007 (This specification is subject to change without further notice) 8-Bit Microcontroller with OTP ROM Reset Type Event EM78P221/2N P: Previous status before reset P: Previous value before reset • 35...

  • Page 42: Interrupt

    R6, R6") is necessary. Each Port 6 pin will have this feature if its status changes. Port 6 Input Status Change Interrupt will wake up the EM78P221/2N from sleep mode if it is enabled prior to going into sleep mode by executing SLEP. When wake-up occurs, the controller will continue to execute the succeeding program if the global interrupt is disabled.
  • Page 43 BANK0-RE/RF RD BANK1-RE/RF WR BANK1-RE/RF BANK1-RE/RF RD BANK0-RE/RF WR Fig. 6-8 Interrupt Input Circuit R1 (5, 4 ,1 ,0) R3 (2 ~0) Fig. 6-9 Interrupt Backup Diagram EM78P221/2N Interrupt Stack ACC occurs Stack R1 Stack R3 RETI Stack R4 • 37...

  • Page 44: Comparator

    8-Bit Microcontroller with OTP ROM 6.7 Comparator The EM78P221/2N has one comparator comprising of two analog inputs and one output. The comparator can be utilized to wake up the EM78P221/2N from sleep mode. The comparator circuit diagram is depicted in the figure below. Cin+ Output Fig.

  • Page 45: Using A Comparator As An Operation Amplifier

    1 = Enable Comparator wake-up When the Comparator output status change is used to enter an interrupt vector or to wake-up the EM78P221/2N from sleep, the CMPWE bit must be set to “Enable“. Comparator interrupt flag. Set when a change occurs in the Comparator output.

  • Page 46: Bank 1-Ra (Cmpcon: Comparator Control Register)

    EM78P221/2N 8-Bit Microcontroller with OTP ROM 6.7.3.2 Bank 1-RA (CMPCON: Comparator Control Register) Bit 7 EIS1 Bit 5 (CMPOUT): The result of the Comparator output Bit 4 ~ Bit 3 (CMPCOS1 ~ CMPCOS0): Comparator Select bits CMPCOS1 CMPCOS0 6.7.3.3 Bank 1-RE (WDT Control Register)

  • Page 47: Oscillator

    Conditions Two clocks 6.8.2 Crystal Oscillator/Ceramic Resonators (Crystal) The EM78P221/2N can be driven by an external clock signal through the OSCO pin as illustrated below. Product Specification (V1.0) 10.19.2007 (This specification is subject to change without further notice)
  • Page 48 EM78P221/2N 8-Bit Microcontroller with OTP ROM In most applications, Pin OSCI and Pin OSCO can be connected with a crystal or ceramic resonator to generate oscillation. Fig. 6-13 below depicts such a circuit. The same applies to the HXT 1, 2 modes and the LXT 1, 2 modes.
  • Page 49 EM78P221/2N 8-Bit Microcontroller with OTP ROM Fig. 6-13-1 Parallel Mode Crystal/Resonator Circuit Diagram • 43 Product Specification (V1.0) 10.19.2007 (This specification is subject to change without further notice)

  • Page 50: External Rc Oscillator Mode

    EM78P221/2N 8-Bit Microcontroller with OTP ROM 6.8.3 External RC Oscillator Mode For some applications that do not require precise timing calculation, the RC oscillator (Fig. 6-14) could offer a cost-effective oscillator configuration. Nevertheless, it should be noted that the frequency of the RC oscillator is...

  • Page 51: Internal Rc Oscillator Mode

    6.8.4 Internal RC Oscillator Mode The EM78P221/2N offers a versatile internal RC mode with default frequency value of 4MHz. Internal RC oscillator mode has other frequencies (1MHz, 16MHz, and 455kHz) that can be set by Code Option (Word 1), RCM1, and RCM0. The Table below describes the EM78P221/2N internal RC drift with the variations on voltage, temperature, and process.

  • Page 52: Residual Voltage Protection

    EM78P221/2N 8-Bit Microcontroller with OTP ROM 6.9.2 Residual Voltage Protection When the battery is replaced, device power Vdd is removed but residual voltage remains. The residual voltage may trip below Vdd minimum, but not to zero. This condition may cause a poor power-on reset. Fig. 6-16 and Fig. 6-17 show how to create a protection circuit against residual voltage.

  • Page 53: Code Option

    Bits 10~9 (LVR1 ~ LVR0): Low Voltage Reset enable bits. If Vdd has crossover at Vdd LVR1, LVR0 Internal Reset 6.11 Code Option EM78P221/2N has two Code Option Words and one Customer ID word that are not a part of the normal program memory. Word 0 Bit 12 ~ Bit 0 6.11.1 Code Option Register (Word 0)
  • Page 54 EM78P221/2N 8-Bit Microcontroller with OTP ROM Bits 12 ~ 11 (Type 1, Type 0): Type selection for EM78P221N or EM78P222N Type 1, Type 0 Note: LVR1 and LVR0 are at Bank 3-R7, when using ICE. Bits 10 ~ 9 (LVR1 ~ LVR0): Low Voltage Reset control bits...

  • Page 55: Code Option Register (Word 1)

    0 = disable noise rejection 1 = enable noise rejection (default). However in Low Crystal oscillator (LXT2) mode, the noise rejection circuit is always disabled. NOTE NOTE EM78P221/2N 8-Bit Microcontroller with OTP ROM Bit 4 Bit 3 Bit 2 Bit 1 RCM1 RCM0 Bit 0 •...

  • Page 56: Customer Id Register (Word 2)

    EM78P221/2N 8-Bit Microcontroller with OTP ROM Bit 1 & Bit 0 (RCM1 & RCM0): RC mode selection bits RCM 1 6.11.3 Customer ID Register (Word 2) Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 12: Not used (reserved), fixed to “0” all the time Bit 11 (NRM): Bits 10~9: Not used (reserved), fixed to “1”...
  • Page 57 MOV A,R R → R 04rr MOV R,R /R → A 04rr COMA R /R → R 04rr COM R R+1 → A 05rr INCA R EM78P221/2N Status Operation Affected None None T, P T, P None None None None None...
  • Page 58 EM78P221/2N 8-Bit Microcontroller with OTP ROM Binary Instruction 0 0101 01rr rrrr 0 0101 10rr rrrr 0 0101 11rr rrrr 0 0110 00rr rrrr 0 0110 01rr rrrr 0 0110 10rr rrrr 0 0110 11rr rrrr 0 0111 00rr rrrr...

  • Page 59: Absolute Maximum Ratings

    /RESET /RESET TCC, INT TCC, INT OSCI in crystal mode OSCI in crystal mode VOH = 0.9VDD VOH = 0.7VDD VOL = 0.1VDD VOL = 0.3VDD EM78P221/2N 85 ° C 150 ° C Vdd+0.5V Vdd+0.5V 5.5V 16MHz Min. Typ. Max.
  • Page 60 EM78P221/2N 8-Bit Microcontroller with OTP ROM Symbol Parameter Pull-high current (Ports 50~53, 64~67) Pull-low current (Ports 60~67) ISB1 Power down current ISB2 Power down current ISB3 Power down current Operating supply current ICC1 at two clocks (VDD=3V) Operating supply current...

  • Page 61: Comparator (Op) Characteristic

    (Tins+20) × N Ta = 25 ° C 11.3 Ta = 25 ° C 2000 Ta = 25 ° C 11.3 − − − Cload=20pF Ta = 25 ° C EM78P221/2N Min. Typ. Max. Unit − − − VDD-1 − − −...

  • Page 62: Timing Diagrams

    EM78P221/2N 8-Bit Microcontroller with OTP ROM 10 Timing Diagrams AC Test Input/Output Waveform VDD-0.5V GND+0.5V AC Testing : Input is driven at VDD-0.5V for logic "1",and GND+0.5V for logic "0".Timing measurements are made at 0.75VDD for logic "1",and 0.25VDD for logic "0".

  • Page 63: Appendix

    Pin Count Skinny DIP 24 pins 24 pins SSOP 24 pins Skinny DIP 28 pins 28 pins SSOP 28 pins EM78P221/222/NxS/xJ Pure Tin Sn: 100% 232°C 11.4 8~10 >50% EM78P221/2N Package Size 300mil 300mil 209mil 300mil 300mil 209mil • 57...

  • Page 64: B Packaging Configuration

    EM78P221/2N 8-Bit Microcontroller with OTP ROM B Packaging Configuration B.1 24-Lead Plastic Skinny Dual in line (SDIP) — 300 mil 58 • (This specification is subject to change without further notice) Symbal Normal 5.334 0.381 3.175 3.302 3.429 0.203 0.254 0.356...

  • Page 65: 24-Lead Plastic Small Outline (Sop) - 300 Mil

    (This specification is subject to change without further notice) 8-Bit Microcontroller with OTP ROM Symbal 2.350 0.102 0.230 7.400 10.000 15.200 0.630 θ TITLE: SOP-24L(300MIL) PACKAGE OUTLINE DIMENSION File : EM78P221/2N Normal 2.650 0.300 0.406(TYP) 0.320 7.600 10.650 15.600 0.838 1.100 1.27(TYP) Edtion: A SO24 Unit : mm...

  • Page 66: 24-Lead Plastic Shrink Small Outline (Ssop) - 209 Mil

    EM78P221/2N 8-Bit Microcontroller with OTP ROM B.3 24-Lead Plastic Shrink Small Outline (SSOP) — 209 mil 60 • (This specification is subject to change without further notice) Symbal Normal 2.00 0.05 1.65 1.75 1.85 0.22 0.38 0.25 0.09 8.20 8.50 7.90...

  • Page 67: 28- Lead Plastic Skinny Dual In Line (Sdip) - 300 Mil

    B.4 28- Lead Plastic Skinny Dual in line (SDIP) — 300 mil Product Specification (V1.0) 10.19.2007 (This specification is subject to change without further notice) EM78P221/2N 8-Bit Microcontroller with OTP ROM Symbal Normal 0.381 3.175 3.302 3.429 0.152 0.356 0.254 35.204...

  • Page 68: 28-Lead Plastic Small Outline (Sop) - 300 Mil

    EM78P221/2N 8-Bit Microcontroller with OTP ROM B.5 28-Lead Plastic Small Outline (SOP) — 300 mil 62 • Symbal 2.370 0.102 0.350 7.410 10.000 17.700 0.678 1.194 θ TITLE: SOP-28L(300MIL) PACKAGE OUTLINE DIMENSION File : Product Specification (V1.0) 10.19.2007 (This specification is subject to change without further notice) Normal 2.500...

  • Page 69: 28- Lead Plastic Shrink Small Outline (Ssop) - 209 Mil

    8-Bit Microcontroller with OTP ROM Symbal 0.050 1.620 0.220 0.090 7.400 5.000 9.900 0.630 θ TITLE: SSOP-28L(209MIL) OUTLINE PACKAGE PACKA OUTLINE DIMENSION File : EM78P221/2N Normal 2.130 0.250 1.750 1.880 0.380 0.200 7.800 8.200 5.300 5.600 10.200 10.500 0.900 1.030 0.650(TYP)

  • Page 70: C Quality Assurance And Reliability

    EM78P221/2N 8-Bit Microcontroller with OTP ROM C Quality Assurance and Reliability Test Category Solder temperature=245±5 ° C, for 5 seconds up to the Solderability stopper using a rosin-type flux Step 1: TCT, 65 ° C (15 mins)~150 ° C (15 mins), 10 cycles Step 2: Bake at 125 °...

Table of Contents