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Sony STR-DA3000ES Service Manual page 101

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• DIGITAL BOARD IC2601 MB91F155-3ES-X100 (MAIN SYSTEM CONTROLLER)
Pin No.
Pin Name
1
DSP CLK
2
DSP HDIN
3
1BST SEL
4
1XRST
5
1PM
6
1GP9
7
1BST
8
1HCS
9
VSS
10
1HDOUT
11
1HACN
12
2XRST
13
2PM
14
2GP3
15
2BST
16
2HCS
17
2HDOUT
18
2HACN
19
2EXLOCK
20
DIR-XMODE
21
DIR-CKSEL
22
DIR-CLK
23
DIR-CE
24
DIR-DO
25
DIR-DI
26
VSS
27
VCC
28
DIR-ERROR
29
DIR-DATAO
30
DIR-XSTATE
31
TA_XCS
32
TA_SO
33
TA_XRST
34
ADINT1
35
ADINT2
36
D595OE
37
LAT1
38
LAT2
39
COM1CLK
40
COM1DATA
41
COM2DATA
42
COM2CLK
43
V595OE
44
VSS
45
V595LAT
I/O
O
Serial data transfer clock signal output to the digital signal processor
O
Serial data output to the digital signal processor
O
Boot strap signal output to the clock select
O
System reset signal output to the digital signal processor "L": reset
O
PLL initialize signal output to the digital signal processor
I
Read ready signal input from the digital signal processor
O
Boot strap signal output to the digital signal processor
Chip select signal output to the digital signal processor
O
Ground terminal
I
Serial data input from the digital signal processor
I
Acknowledge signal input from the digital signal processor
O
System reset signal output to the digital signal processor "L": reset
O
PLL initialize signal output to the digital signal processor
I
Read ready signal input from the digital signal processor
Boot strap signal output to the digital signal processor
O
Chip select signal output to the digital signal processor
O
I
Serial data input from the digital signal processor
I
Acknowledge signal input from the digital signal processor
O
PLL lock error signal and data error flag output to the digital sigal processor
O
System reset signal output to the digital audio interface receiver "L": reset
O
Output clock selection signal output to the digital audio interface receiver
O
Clock signal output to the digital audio interface receiver
O
Chip enable signal output to the digital audio interface receiver
I
Read data input from the digital audio interface receiver
O
Write data output to the digital audio interface receiver
Ground terminal
Power supply terminal (+3.3V)
I
PLL lock error signal and data error flag input from the digital audio interface receiver
I
Audio serial data input from the digital audio interface receiver
I
Source clock selection monitor input from the digital audio interface receiver
O
Chip select signal output to the lip sync adjust Not used
I
Serial data input from the lip sync adjust Not used
O
Reset signal output to the lip sync adjust Not used
O
Reset signal output to the A/D converter
O
Reset signal output to the sub-2 system controller
O
Output enable signal output to the TC74HC595AF
O
Serial data latch pulse output to the TC74HC595AF
O
Serial data latch pulse output to the TC74HC595AF
O
Common clock signal output terminal
O
Common data output terminal
O
Common data output terminal
O
Common data transfer clock signal output terminal
O
Output enable signal output to the TC74HC595AF
Ground terminal
O
Serial data latch pulse output to the TC74HC595A
Description
STR-DA3000ES
101

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