NEC uPD78P078Y Manuals

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NEC uPD78P078Y User Manual (627 pages)

PD78078 Series; PD78078Y Series 8-bit Single-chip Microcontrollers

Brand: NEC | Category: Computer Hardware | Size: 2.53 MB

Table of Contents
13
Chapter 1 Outline ( Pd78078 Subseries)

33
- Features
  
  33
- Application Fields
  
  34
- Ordering Information
  
  34
- Quality Grade
  
  35
- Pin Configuration (Top View)
  
  36
- Series Expansion
  
  42
- Block Diagram
  
  44
- Outline of Function
  
  45
- Mask Options
  
  47
- Differences with PD78054 Subseries
  
  47
  - Mask Options of Mask ROM Versions
    47
  - Differences between PD78078 Subseries and PD78054 Subseries
    47
Chapter 2 Outline ( Pd78078Y Subseries)

49
- Features
  
  49
- Application Fields
  
  50
- Ordering Information
  
  50
- Quality Grade
  
  51
- Pin Configuration (Top View)
  
  52
- Series Expansion
  
  58
- Block Diagram
  
  60
- Outline of Function
  
  61
- Mask Options
  
  63
- Differences with PD78054Y Subseries
  
  63
  - Differences between PD78078Y Subseries and PD78054Y Subseries
    63
Chapter 3 Pin Function ( Pd78078 Subseries)

65
- Pin Function List
  
  65
  - Normal Operating Mode Pins
    65
  - PROM Programming Mode Pins ( PD78P078 Only)
    69
- Description of Pin Functions
  
  70
  - P00 to P07 (Port 0)
    70
  - P10 to P17 (Port 1)
    70
  - P20 to P27 (Port 2)
    71
  - P30 to P37 (Port 3)
    72
  - P40 to P47 (Port 4)
    72
  - P50 to P57 (Port 5)
    73
  - P60 to P67 (Port 6)
    73
  - P70 to P72 (Port 7)
    74
  - P80 to P87 (Port 8)
    74
  - P90 to P96 (Port 9)
    75
  - P100 to P103 (Port 10)
    75
  - P120 to P127 (Port 12)
    75
  - P130 and P131 (Port 13)
    76
  - Av
    76
  - Ref1
    76
  - Av Ref1
    76
  - Av DD
    76
  - Av Ss
    76
  - Reset
    76
  - X1 and X2
    76
  - XT1 and XT2
    76
  - VDD
    77
  - Vss
    77
  - VPP ( PD78P078 Only)
    77
  - IC (Mask ROM Version Only)
    77
- Input/Output Circuits and Recommended Connection of Unused Pins
  
  78
  - Pin Input/Output Circuit Types
    78
    
    List of Pin Input/Output Circuits
    80
Chapter 4 Pin Function ( Pd78078Y Subseries)

83
- Pin Function List
  
  83
  - Normal Operating Mode Pins
    83
  - PROM Programming Mode Pins ( PD78P078Y Only)
    87
- Description of Pin Functions
  
  88
  - P00 to P07 (Port 0)
    88
  - P10 to P17 (Port 1)
    88
  - P20 to P27 (Port 2)
    89
  - P30 to P37 (Port 3)
    90
  - P40 to P47 (Port 4)
    90
  - P50 to P57 (Port 5)
    91
  - P60 to P67 (Port 6)
    91
  - P70 to P72 (Port 7)
    92
  - P80 to P87 (Port 8)
    92
  - P90 to P96 (Port 9)
    93
  - P100 to P103 (Port 10)
    93
  - P120 to P127 (Port 12)
    93
  - P130 and P131 (Port 13)
    94
  - Ref0
    94
  - Ref1
    94
    
    Av Ref0
    94
    
    Av Ref1
    94
  - Av DD
    94
  - Av Ss
    94
  - Reset
    94
  - X1 and X2
    94
  - XT1 and XT2
    94
  - VDD
    95
  - Vss
    95
  - PP ( PD78P078Y Only)
    95
  - IC (Mask ROM Version Only)
    95
- Input/Output Circuits and Recommended Connection of Unused Pins
  
  96
  - Pin Input/Output Circuit Types
    96
    
    List of Pin Input/Output Circuits
    98
Chapter 5 Cpu Architecture

101
- Memory Spaces
  
  101
  - Memory Map ( PD78076, 78076Y)
    101
  - Memory Map ( PD78078, 78078Y)
    102
  - Memory Map ( PD78P078, PD78P078Y)
    103
    
    Internal Program Memory Space
    104
  - Internal ROM Capacities
    104
  - Vector Table
    105
    
    External Memory Space
    106
    
    Internal Data Memory Space
    106
    
    Special Function Register (SFR) Area
    106
    
    Data Memory Addressing
    107
    
    Data Memory Addressing ( PD78078, 78078Y)
    108
    
    Data Memory Addressing ( PD78P078, 78P078Y)
    109
- Processor Registers
  
  110
  - Control Registers
    110
  - Program Counter Configuration
    110
  - Program Status Word Configuration
    110
  - Data to be Saved to Stack Memory
    112
    
    Data to be Reset from Stack Memory
    112
    
    General Registers
    113
  - Stack Pointer Configuration
    112
  - General Register Configuration
    113
    
    Special Function Register (SFR)
    114
  - Special Function Register List
    115
- Instruction Address Addressing
  
  118
  - Relative Addressing
    118
  - Immediate Addressing
    119
  - Table Indirect Addressing
    120
  - Register Addressing
    121
- Operand Address Addressing
  
  122
  - Implied Addressing
    122
  - Register Addressing
    123
  - Direct Addressing
    124
  - Short Direct Addressing
    125
  - Special Function Register (SFR) Addressing
    126
  - Register Indirect Addressing
    127
  - Based Addressing
    128
  - Based Indexed Addressing
    129
  - Stack Addressing
    129
Chapter 6 Port Functions

131
- Port Functions
  131
- Port Types
  131
- Port Functions ( PD78078 Subseries)
  132
- Port Functions ( PD78078Y Subseries)
  134
- Port Configuration
  
  136
  - Port 0
    136
  - Block Diagram of P00 and P07
    137
  - Block Diagram of P01 to P06
    137
    
    Port 1
    138
  - Block Diagram of P10 to P17
    138
    
    Port 2 ( PD78078 Subseries)
    139
  - Block Diagram of P20, P21, P23 to P26
    139
  - Block Diagram of P22 and P27
    140
    
    Port 2 ( PD78078Y Subseries)
    141
  - Block Diagram of P20, P21, P23 to P26
    141
  - Block Diagram of P22 and P27
    142
    
    Port 3
    143
  - Block Diagram of P30 to P37
    143
    
    Port 12
    144
    
    Port 4
    144
  - Block Diagram of P40 to P47
    144
    
    Block Diagram of Falling Edge Detection Circuit
    144
    
    Port 5
    145
  - Block Diagram of P50 to P57
    145
    
    Port 6
    146
  - Block Diagram of P60 to P63
    147
  - Block Diagram of P64 to P67
    147
    
    Port 7
    148
  - Block Diagram of P70
    148
  - Block Diagram of P71 and P72
    149
    
    Port 8
    150
  - Block Diagram of P80 to P87
    150
    
    Port 9
    151
  - Block Diagram of P90 to P93
    152
  - Block Diagram of P94 to P96
    152
    
    Block Diagram of P100 and P101
    153
    
    Port 10
    153
    
    Block Diagram of P102 and P103
    154
  - Block Diagram of P120 to P127
    155
    
    Port 13
    156
  - Block Diagram of P130 and P131
    156
- Port Function Control Registers
  
  157
- Port Function Operations
  
  163
- Selection of Mask Option
  
  164
Chapter 7 Clock Generator

165
Chapter 8 16-Bit Timer/Event Counter

181
Chapter 9 8-Bit Timer/Event Counters 1 and 2

223
Chapter 10 8-Bit Timer/Event Counters 5 and 6

249
Chapter 11 Watch Timer

269
- Watch Timer Functions
  
  269
  - Interval Timer Interval Time
    269
- Watch Timer Configuration
  
  270
- Watch Timer Control Registers
  
  271
- Watch Timer Operations
  
  274
  - Watch Timer Operation
    274
  - Interval Timer Operation
    274
  - Interval Timer Interval Time
    274
Chapter 12 Watchdog Timer

275
- Watchdog Timer Functions
  
  275
  - Interval Times
    276
- Watchdog Timer Configuration
  
  277
  - Watchdog Timer Block Diagram
    277
- Watchdog Timer Control Registers
  
  278
  - Timer Clock Select Register 2 Format
    279
  - Watchdog Timer Mode Register Format
    280
- Watchdog Timer Operations
  
  281
  - Watchdog Timer Operation
    281
  - Watchdog Timer Runaway Detection Times
    281
    
    Interval Timer Interval Time
    282
    
    Interval Timer Operation
    282
Chapter 13 Clock Output Control Circuit

283
Chapter 14 Buzzer Output Control Circuit

289
Chapter 15 A/D Converter

293
Chapter 16 D/A Converter

309
- D/A Converter Functions
  
  309
- D/A Converter Configuration
  
  310
  - D/A Converter Block Diagram
    310
- D/A Converter Control Registers
  
  312
  - D/A Converter Mode Register Format
    312
- D/A Converter Operations
  
  313
- D/A Converter Cautions
  
  314
  - Use Example of Buffer Amplifier
    314
Chapter 17 Serial Interface Channel 0 ( Pd78078 Subseries)

315
- Differences between Channels 0, 1, and 2
  315
- Serial Interface Channel 0 Functions
  
  316
  - Serial Bus Interface (SBI) System Configuration Example
    317
- Serial Interface Channel 0 Configuration
  
  318
  - Serial Interface Channel 0 Block Diagram
    318
- Serial Interface Channel 0 Control Registers
  
  321
- Serial Interface Channel 0 Operations
  
  328
  - Operation Stop Mode
    328
  - 3-Wire Serial I/O Mode Operation
    329
    
    RELT and CMDT Operations
    331
    
    Wire Serial I/O Mode Timings
    331
    
    Circuit of Switching in Transfer Bit Order
    332
  - SBI Mode Operation
    333
  - Example of Serial Bus Configuration with SBI
    333
  - SBI Transfer Timings
    335
  - Bus Release Signal
    336
  - Command Signal
    336
  - Addresses
    337
  - Slave Selection with Address
    337
  - Commands
    338
    
    Data
    338
    
    Acknowledge Signal
    339
  - BUSY and READY Signals
    339
  - RELT, CMDT, RELD, and CMDD Operations (Master)
    344
  - ACKT Operation
    345
  - ACKE Operations
    346
  - ACKD Operations
    347
  - BSYE Operation
    347
    
    Various Signals in SBI Mode
    348
    
    Pin Configuration
    350
  - Address Transmission from Master Device to Slave Device (WUP = 1)
    352
  - Command Transmission from Master Device to Slave Device
    353
  - Data Transmission from Master Device to Slave Device
    354
  - Data Transmission from Slave Device to Master Device
    355
    
    2-Wire Serial I/O Mode Operation
    357
    
    Serial Bus Configuration Example Using 2-Wire Serial I/O Mode
    357
    
    RELT and CMDT Operations
    361
    
    Wire Serial I/O Mode Timings
    361
    
    SCK0/P27 Pin Configuration
    363
    
    SCK0/P27 Pin Output Manipulation
    363
CHAPTER 18 SERIAL INTERFACE CHANNEL 0 ( PD78078Y Subseries)

365
- Differences between Channels 0, 1, and 2
  365
- Serial Interface Channel 0 Functions
  
  366
- Serial Interface Channel 0 Configuration
  
  368
  - Serial Interface Channel 0 Block Diagram
    369
  - Serial Interface Channel 0 Interrupt Request Signal Generation
    371
- Serial Interface Channel 0 Control Registers
  
  372
- Serial Interface Channel 0 Operations
  
  380
  - Operation Stop Mode
    380
  - 3-Wire Serial I/O Mode Operation
    381
  - Wire Serial I/O Mode Timings
    383
  - RELT and CMDT Operations
    383
  - Circuit of Switching in Transfer Bit Order
    384
    
    2-Wire Serial I/O Mode Operation
    385
  - Serial Bus Configuration Example Using 2-Wire Serial I/O Mode
    385
  - Wire Serial I/O Mode Timings
    388
  - RELT and CMDT Operations
    389
    
    C Bus Mode Operation
    390
    
    I 2 C Bus Serial Data Transfer Timing
    391
  - Start Condition
    392
  - Address
    392
  - Transfer Direction Specification
    392
  - Stop Condition
    393
  - Acknowledge Signal
    393
  - Wait Signal
    394
    
    Pin Configuration
    399
    
    Cautions on Use of I C Bus Mode
    408
  - Start Condition Output
    408
  - Slave Wait Release (Transmission)
    409
  - Slave Wait Release (Reception)
    410
    
    Restrictions in I 2 C Bus Mode
    411
    
    Restrictions in I C Bus Mode
    411
    
    SCK0/SCL/P27 Pin Configuration
    413
    
    SCK0/SCL/P27 Pin Output Manipulation
    413
  - SCK0/SCL/P27 Pin Configuration
    414
  - Logic Circuit of SCL Signal
    414
Chapter 19 Serial Interface Channel 1

415
Chapter 20 Serial Interface Channel 2

457
Chapter 21 Real-Time Output Port

495
Chapter 22 Interrupt Functions

499
Chapter 23 External Device Expansion Function

527
Chapter 24 Standby Function

545
- Standby Function and Configuration
  
  545
- Standby Function Operations
  
  547
  - HALT Mode
    547
  - HALT Mode Released by Interrupt Request Generation
    548
  - HALT Mode Released by RESET Input
    549
  - Operation after HALT Mode Release
    549
    
    STOP Mode
    550
    
    STOP Mode Released by Interrupt Request Generation
    551
  - Operation after STOP Mode Release
    552
  - STOP Mode Released by RESET Input
    552
Chapter 25 Reset Function

553
- Reset Function
  553
- Block Diagram of Reset Function
  553
- Timing of Reset by RESET Input
  554
- Timing of Reset Due to Watchdog Timer Overflow
  554
- Timing of Reset by RESET Input in STOP Mode
  554
- Hardware Status after Reset
  555
Chapter 26 Rom Correction

559
- ROM Correction Functions
  
  559
- ROM Correction Configuration
  
  559
  - Block Diagram of ROM Correction
    559
  - Correction Address Registers 0 and 1 Format
    560
- ROM Correction Control Registers
  
  561
  - Correction Control Register Format
    561
- ROM Correction Application
  
  562
- ROM Correction Example
  
  565
- Program Execution Flow
  
  566
  - Program Transition Diagram (When One Place Is Corrected)
    566
  - Program Transition Diagram (When Two Places Are Corrected)
    567
- Cautions on ROM Correction
  
  568
Chapter 27 Pd78P078, 78P078Y

569
- Differences between PROM and Mask ROM Versions
  569
- Internal Memory Size Switching Register
  
  570
  - Examples of Internal Memory Size Switching Register Settings
    570
  - Examples of Internal Extension RAM Size Switching Register Settings
    571
- Internal Extension RAM Size Switching Register
  
  571
- PROM Programming
  
  572
  - Operating Modes
    572
  - PROM Programming Operating Modes
    572
  - PROM Write Procedure
    574
  - Page Program Mode Flowchart
    574
  - Page Program Mode Timing
    575
  - Byte Program Mode Flowchart
    576
  - Byte Program Mode Timing
    577
    
    PROM Reading Procedure
    578
  - PROM Read Timing
    578
- Erasure Procedure ( PD78P078KL-T and 78P078YKL-T Only)
  
  579
- Opaque Film Masking Window ( PD78P078KL-T and 78P078YKL-T Only)
  
  579
- Screening of One-Time PROM Versions
  
  579
Chapter 28 Instruction Set

581
- Legends Used in Operation List
  
  582
- Operation List
  
  584
- Instructions Listed by Addressing Type
  
  592
Appendix A Differences between Pd78078, 78075B Subseries, and Pd78070A

597
APPENDIX A DIFFERENCES between Μpd78078, 78075B SUBSERIES, and Μpd78070A

599
Appendix B Development Tools

599
- B-1 Development Tool Configuration
  600
- Language Processing Software
  
  602
- PROM Writing Tools
  
  604
  - Hardware
    604
  - Software
    604
    
    B.2.1 Hardware
    604
    
    B.2.2 Software
    604
- Debugging Tools
  
  605
  - Hardware
    605
    
    B.3 Debugging Tools
    605
    
    B.3.1 Hardware
    605
  - Software
    607
  - B.3.2 Software
    607
- OS for IBM PC
  
  609
- System Upgrading from Former-Type In-Circuit Emulator for 78K/0 Series to IE-78001-R-A
  
  609
Appendix C Embedded Software

613
Appendix D Register Index

615
- Register Name Index
  
  615
- Register Symbol Index
  
  619
Appendix Erevision History

623

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NEC uPD78P078Y Manuals

NEC uPD78P078Y User Manual (627 pages)

Table of Contents

Chapter 1 Outline ( Pd78078 Subseries)

Features

Application Fields

Ordering Information

Quality Grade

Pin Configuration (Top View)

Series Expansion

Block Diagram

Outline of Function

Mask Options

Differences with PD78054 Subseries

Chapter 2 Outline ( Pd78078Y Subseries)

Features

Application Fields

Ordering Information

Quality Grade

Pin Configuration (Top View)

Series Expansion

Block Diagram

Outline of Function

Mask Options

Differences with PD78054Y Subseries

Chapter 3 Pin Function ( Pd78078 Subseries)

Pin Function List

Description of Pin Functions

Input/Output Circuits and Recommended Connection of Unused Pins

Chapter 4 Pin Function ( Pd78078Y Subseries)

Pin Function List

Description of Pin Functions

Input/Output Circuits and Recommended Connection of Unused Pins

Chapter 5 Cpu Architecture

Memory Spaces

Processor Registers

Instruction Address Addressing

Operand Address Addressing

Chapter 6 Port Functions

Port Configuration

Port Function Control Registers

Port Function Operations

Selection of Mask Option

Chapter 7 Clock Generator

Clock Generator Functions

Clock Generator Configuration

Clock Generator Control Register

System Clock Oscillator

Clock Generator Operations

Changing System Clock and CPU Clock Settings

Chapter 8 16-Bit Timer/Event Counter

Outline of Timers Incorporated into PD78078, 78078Y Subseries

16-Bit Timer/Event Counter Functions

16-Bit Timer/Event Counter Configuration

16-Bit Timer/Event Counter Control Registers

16-Bit Timer/Event Counter Operations

16-Bit Timer/Event Counter Operating Precautions

Chapter 9 8-Bit Timer/Event Counters 1 and 2

8-Bit Timer/Event Counters 1 and 2 Functions

8-Bit Timer/Event Counters 1 and 2 Configurations

8-Bit Timer/Event Counters 1 and 2 Control Registers

8-Bit Timer/Event Counters 1 and 2 Operations

8-Bit Timer/Event Counters 1 and 2 Precautions

Chapter 10 8-Bit Timer/Event Counters 5 and 6

8-Bit Timer/Event Counters 5 and 6 Functions

8-Bit Timer/Event Counters 5 and 6 Configurations

8-Bit Timer/Event Counters 5 and 6 Control Registers

8-Bit Timer/Event Counters 5 and 6 Operations

8-Bit Timer/Event Counters 5 and 6 Precautions

Chapter 11 Watch Timer

Watch Timer Functions

Watch Timer Configuration

Watch Timer Control Registers

Watch Timer Operations

Chapter 12 Watchdog Timer

Watchdog Timer Functions

Watchdog Timer Configuration

Watchdog Timer Control Registers

Watchdog Timer Operations

Chapter 13 Clock Output Control Circuit