HP 8114A Specifications
Trigger
Output
Level
Output Impedance
Trigger pulse width
Maximum external voltage
Transition times
Delay from External Input to Trigger Output
External Input,
Input impedance
Threshold
Maximum external voltage
Input transitions
Input frequency
Minimum pulse width
Input sensitivity
Fixed TTL (2.5 V into 5OC)
typical
50% of period, typical
-2 v/+7 v
5 ns typical
24 ns typical
An external signal at the external input can be used to trigger or gate
the output signal.
10 k62
-10 V to + 10 V with 100 mV resolution
150 v
dc to 15MHz
10 ns typical