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APPENDICES
Appendix 1
The functions of the RFID interface module can be set with module labels.
Module label list
The following table lists the model labels.
[X] of a label name means the module number that is added to identify the modules having the same module name.
R: Readable, W: Writable
Type
Label name
System
ER1V680D_[x]
ER1V680D_[x].uIO
Input
ER1V680D_[x].bModuleREADY
signal
ER1V680D_[x].stER1V680D_Channel1_D.bCH1_IDCommunicationComplete
ER1V680D_[x].stER1V680D_Channel1_D.bCH1_IDBUSY
ER1V680D_[x].stER1V680D_Channel1_D.bCH1_IDCommandComplete
ER1V680D_[x].stER1V680D_Channel1_D.bCH1_ErrorDetection
ER1V680D_[x].stER1V680D_Channel2_D.bCH2_IDCommunicationComplete
ER1V680D_[x].stER1V680D_Channel2_D.bCH2_IDBUSY
ER1V680D_[x].stER1V680D_Channel2_D.bCH2_IDCommandComplete
ER1V680D_[x].stER1V680D_Channel2_D.bCH2_ErrorDetection
ER1V680D_[x].bModuleREADY_D
ER1V680D_[x].stER1V680D_Channel1_D.bCH1_IDCommunicationComplete
_D
ER1V680D_[x].stER1V680D_Channel1_D.bCH1_IDBUSY_D
ER1V680D_[x].stER1V680D_Channel1_D.bCH1_IDCommandComplete_D
ER1V680D_[x].stER1V680D_Channel1_D.bCH1_ErrorDetection_D
ER1V680D_[x].stER1V680D_Channel2_D.bCH2_IDCommunicationComplete
_D
ER1V680D_[x].stER1V680D_Channel2_D.bCH2_IDBUSY_D
ER1V680D_[x].stER1V680D_Channel2_D.bCH2_IDCommandComplete_D
ER1V680D_[x].stER1V680D_Channel2_D.bCH2_ErrorDetection_D
Output
ER1V680D_[x].stER1V680D_Channel1_D.bCH1_IDCommandExecutionReq
signal
uest
ER1V680D_[x].stER1V680D_TESTMode_D.bTESTModeExecutionRequest
ER1V680D_[x].stER1V680D_Channel1_D.bCH1_ResultReception
ER1V680D_[x].stER1V680D_Channel2_D.bCH2_IDCommandExecutionReq
uest
ER1V680D_[x].stER1V680D_Channel2_D.bCH2_ResultReception
ER1V680D_[x].stER1V680D_Channel1_D.bCH1_IDCommandExecutionReq
uest_D
ER1V680D_[x].stER1V680D_TESTMode_D.bTESTModeExecutionRequest_
D
ER1V680D_[x].stER1V680D_Channel1_D.bCH1_ResultReception_D
ER1V680D_[x].stER1V680D_Channel2_D.bCH2_IDCommandExecutionReq
uest_D
ER1V680D_[x].stER1V680D_Channel2_D.bCH2_ResultReception_D
Module Label
Description
Available
device No./
buffer memory
address
Module label structure
First I/O No.
Module READY
X0
CH1 ID communication complete
X2
CH1 ID-BUSY
X3
CH1 ID command complete
X4
CH1 Error detection
X5
CH2 ID communication complete
XA
CH2 ID-BUSY
XB
CH2 ID command complete
XC
CH2 Error detection
XD
Module READY (direct)
DX0
CH1 ID communication complete
DX2
(direct)
CH1 ID-BUSY (direct)
DX3
CH1 ID command complete
DX4
(direct)
CH1 Error detection (direct)
DX5
CH2 ID communication complete
DXA
(direct)
CH2 ID-BUSY (direct)
DXB
CH2 ID command complete
DXC
(direct)
CH2 Error detection (direct)
DXD
CH1 ID command execution
Y14
request
TEST mode execution request
Y15
CH1 Result reception
Y16
CH2 ID command execution
Y1C
request
CH2 Result reception
Y1E
CH1 ID command execution
DY14
request (direct)
TEST mode execution request
DY15
(direct)
CH1 Result reception (direct)
DY16
CH2 ID command execution
DY1C
request (direct)
CH2 Result reception (direct)
DY1E
Appendix 1 Module Label
R/W
R
R
R
R
R
R
R
R
R
R
R
A
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
APPX
117
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