Siemens SIMATIC S7 System Manual page 276

Hide thumbs Also See for SIMATIC S7:

Table of Contents

Program instructions

7.6 Counters

HSC status byte

A status byte for each high-speed counter provides status memory bits that indicate the

current counting direction and whether the current value is greater than or equal to the

preset value. The following table defines these status bits for each high-speed counter.

Status bits are valid only while the high-speed counter interrupt routine executes. The

purpose of monitoring the state of the high-speed counter is to enable interrupts for the

events that are of consequence to the operation being performed.

Reference information

Refer to the following sections for further information:

● High-speed counter instructions (Page 257)

● High-speed counter summary (Page 260)

● Example initialization sequences for high-speed counters (Page 277)

Status bits for HSC0, HSC1, HSC2, HSC3, HSC4, and HSC5

SM136.5 SM146.5 SM156.5 Current counting direction status bit:

SM136.6 SM146.6 SM156.6 Current value equals preset value

SM136.7 SM146.7 SM156.7 Current value greater than preset

0 = Counting down

1 = Counting up

0 = Not equal

value status bit:

0 = Less than or equal

1 = Greater than

System Manual, V2.3, 07/2017, A5E03822230-AF

S7-200 SMART

Show Quick Links

Table of Contents

Troubleshooting

Simatic s7-200 smart