Module View and Block Diagram of the
Select the measuring method of the input channels and the output type of the
output channels via the wiring.
Figure 4-55
Module View and Block Diagram of the Analog Input/Output Module SM 334;
AI 4/AO 2 x 8/8 bits
Note
Note when connecting the SM 334 that:
•
the analog chassis ground M
chassis ground M of the CPU and/or the interface module (IM). Use a wire
with a minimum cross-section of 1 mm
If there is no ground connection between M
off. Inputs are read with 7FFF
without a ground connection for some time, it may be destroyed.
•
The supply voltage for the CPU and/or the interface module (IM) must not
be connected with reversed polarity. Reverse polarity causes the
destruction of the module because M
potential (+24 V).
Programmable Logic Controllers S7-300 Module Data
A5E00105505-03
SM 334; AI 4/AO 2 x 8/8 bits
Internal
supply
ADC
Backplane
bus
interface
DAC
ANA
; outputs return a value of 0. If the module is run
H
L +
24V
V
A
V
A
V
A
V
A
V
M
A
ANA
V
M
A
ANA
M
M
(terminal 15 or 18) is connected to the
2
for this.
and M, the module switches
ANA
is subjected to an unauthorized high
ANA
Analog Modules
MV
0 +
M
0*
CH0
MI
0 +
MV
1 +
M
CH1
1*
MI
1 +
MV
2 +
M
CH2
2*
MI
2 +
MV
3 +
M
3*
CH3
MI
3 +
QV
0
M
ANA
CH0
QI
0
QV
1
M
ANA
CH1
QI
1
4-189