PLC concepts
4.2 Data storage, memory areas, I/O and addressing
Q_:P accesses are also restricted to the size of outputs supported by a single CPU, SB, or
SM, rounded up to the nearest byte. For example, if the outputs of a 2 DI / 2 DQ SB are
configured to start at Q4.0, then the output points can be accessed as Q4.0:P and Q4.1:P or
as QB4:P. Accesses to Q4.2:P through Q4.7:P are not rejected, but make no sense since
these points are not used. Accesses to QW4:P and QD4:P are prohibited since they exceed
the byte offset associated with the SB.
Accesses using Q_:P affect both the physical output as well as the corresponding value
stored in the output process image.
Table 4- 22
Bit
Byte, Word, or Double word
M (bit memory area): Use the bit memory area (M memory) for both control relays and data
to store the intermediate status of an operation or other control information. You can access
the bit memory area in bits, bytes, words, or double words. Both read and write access is
permitted for M memory.
Table 4- 23
Bit
Byte, Word, or Double Word
Temp (temporary memory): The CPU allocates the temp memory on an as-needed basis.
The CPU allocates the temp memory for the code block and initializes the memory locations
to 0 at the time when it starts the code block (for an OB) or calls the code block (for an FC or
FB).
Temp memory is similar to M memory with one major exception: M memory has a "global"
scope, and temp memory has a "local" scope:
● M memory: Any OB, FC, or FB can access the data in M memory, meaning that the data
is available globally for all of the elements of the user program.
● Temp memory: The CPU restricts access to the data in temp memory to the OB, FC, or
FB that created or declared the temp memory location. Temp memory locations remain
local and different code blocks do not share temp memory, even when the code block
calls another code block. For example: When an OB calls an FC, the FC cannot access
the temp memory of the OB that called it.
The CPU provides temp (local) memory for each OB priority level:
● 16 Kbytes for startup and program cycle, including associated FBs and FCs
● 6 Kbytes for each additional interrupt event thread, including associated FBs and FCs
You access temp memory by symbolic addressing only.
DB (data block): Use the DB memory for storing various types of data, including intermediate
status of an operation or other control information parameters for FBs, and data structures
required for many instructions such as timers and counters. You can access data block
memory in bits, bytes, words, or double words. Both read and write access is permitted for
read/write data blocks. Only read access is permitted for read-only data blocks.
108
Absolute addressing for Q memory (immediate)
Q[byte address].[bit address]:P
Q[size][starting byte address]:P
Absolute addressing for M memory
M[byte address].[bit address]
M[size][starting byte address]
Q1.1:P
QB5:P, QW10:P or QD40:P
M26.7
MB20, MW30, MD50
S7-1200 Programmable controller
System Manual, 03/2014, A5E02486680-AG