Overview of the Ethernet SPAs
• BITS In
• BITS Out
• GPS In
• GPS Out
The 2-Port Gigabit Synchronous Ethernet SPA (SPA-2X1GE-SYNCE) is compatible with the 2-Port GigE
SPA-v2, and provides additional services, such as clock frequency and time-of-day synchronization, using
the following technologies:
• Synchronous Ethernet (SyncE)
• ESMC
SyncE defined by ITU-T standards, such as G.8261, G.8262, G.8264, and G.781,and leverages the PHY layer
of Ethernet to transmit frequency to remote sites. SyncE provides a cost-effective alternative to the SONET
networks. For SyncE to work, each network element must along with the synchronization path, support SyncE.
SPA Architecture
This section provides an overview of the architecture of the Gigabit Ethernet SPAs and describes the path of
a packet in the ingress and egress directions. Some of these areas of the architecture are referenced in the SPA
software and can be helpful to understand when troubleshooting or interpreting some of the SPA CLI and
show command output.
Every incoming and outgoing packet on the Gigabit Ethernet SPAs goes through the physical (PHY) SFP
optics, the Media Access Controller (MAC), and a Layer 2 Filtering/Accounting ASIC.
Path of a Packet in the Ingress Direction
The following steps describe the path of an ingress packet through the Gigabit Ethernet SPAs:
1 For one-Gigabit Ethernet SPAs, the SFP optics receive incoming frames on a per-port basis from one of
the optical fiber interface connectors.
2 For ten-Gigabit Ethernet SPAs, the XFP PHY device processes the frame and sends it over a serial interface
to the MAC device.
3 The MAC device receives the frame, strips the CRCs, and sends the packet via the SPI 4.2 bus to the
ASIC.
4 The ASIC takes the packet from the MAC devices and classifies the Ethernet information. CAM lookups
based on Ethertype, port, VLAN, and source and destination address information determine whether the
packet is dropped or forwarded to the SPA interface.
Path of a Packet in the Egress Direction
The following steps describe the path of an egress packet from the SIP through the Gigabit Ethernet SPAs:
1 The packet is sent to the ASIC using the SPI 4.2 bus. The packets are received with Layer 2 and Layer 3
headers in addition to the packet data.
OL-14127-17
Cisco ASR 1000 Series Aggregation Services Routers SIP and SPA Software Configuration Guide, Cisco IOS XE
SPA Architecture
Everest 16.5
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